minix/u-boot
1
0
Fork 0
mirror of https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git synced 2025-09-05 09:56:34 -04:00
Code Issues Packages Projects Releases Wiki Activity

fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)

Browse Source 
Issue:
The NOR-FCM does not support access to unaligned addresses for 16 bit port size

Impact:
When 16 bit port size is used, accesses not aligned to 16 bit address boundary
will result in incorrect data

Workaround:
The workaround is to switch to GPCM mode for NOR Flash access.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Poonam Aggrwal 2011-06-30 03:00:28 -05:00 committed by Kumar Gala
parent e8e6197ab2
commit 42aee64bd9
3 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/powerpc/cpu/mpc85xx/cmd_errata.c
View File

@ -86,6 +86,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
puts("Work-around for Erratum DDR111 enabled\n");
puts("Work-around for Erratum DDR134 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
puts("Work-around for Erratum IFC-A002769 enabled\n");
#endif
return 0;
}

2
arch/powerpc/include/asm/config_mpc85xx.h
View File

@ -112,6 +112,7 @@
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
/* P1011 is single core version of P1020 */
#elif defined(CONFIG_P1011)
@ -160,6 +161,7 @@
#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
/* P1015 is single core version of P1024 */
#elif defined(CONFIG_P1015)

5
arch/powerpc/include/asm/fsl_ifc.h
View File

@ -951,5 +951,10 @@ struct fsl_ifc {
struct fsl_ifc_gpcm ifc_gpcm;
};
#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
#undef CSPR_MSEL_NOR
#define CSPR_MSEL_NOR CSPR_MSEL_GPCM
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASM_PPC_FSL_IFC_H */