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MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT

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This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This
enables support for boards where the lowlevel initialization is
already done when U-Boot runs (e.g. via OnChip ROM).

This will be used in the upcoming VCTH board support.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This commit is contained in:
Stefan Roese 2008-11-18 16:36:22 +01:00 committed by Shinya Kuribayashi
parent db08ecaa6e
commit 4417434368
1 changed files with 4 additions and 0 deletions
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4
cpu/mips/start.S
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@ -243,9 +243,11 @@ reset:
mtc0 zero, CP0_COUNT mtc0 zero, CP0_COUNT
mtc0 zero, CP0_COMPARE mtc0 zero, CP0_COMPARE
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
/* CONFIG0 register */ /* CONFIG0 register */
li t0, CONF_CM_UNCACHED li t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG mtc0 t0, CP0_CONFIG
#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
/* Initialize $gp. /* Initialize $gp.
*/ */
@ -255,6 +257,7 @@ reset:
1: 1:
lw gp, 0(ra) lw gp, 0(ra)
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
/* Initialize any external memory. /* Initialize any external memory.
*/ */
la t9, lowlevel_init la t9, lowlevel_init
@ -271,6 +274,7 @@ reset:
*/ */
li t0, CONF_CM_CACHABLE_NONCOHERENT li t0, CONF_CM_CACHABLE_NONCOHERENT
mtc0 t0, CP0_CONFIG mtc0 t0, CP0_CONFIG
#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
/* Set up temporary stack. /* Set up temporary stack.
*/ */