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i.MX28: Fix VDDIO and VDDA setup

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The DC power STS shouldn't be checked if booting off 5V supply.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Robert Deliën <robert@delien.nl>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
This commit is contained in:
Marek Vasut 2012-01-30 14:00:01 +00:00 committed by Albert ARIBAUD
parent 782bb0d236
commit 534dbd1219
1 changed files with 12 additions and 4 deletions
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16
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
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@ -726,7 +726,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
clrsetbits_le32(&power_regs->hw_power_vddioctrl, clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff); POWER_VDDIOCTRL_TRG_MASK, diff);
if (powered_by_linreg) if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500); early_delay(1500);
else { else {
while (!(readl(&power_regs->hw_power_sts) & while (!(readl(&power_regs->hw_power_sts) &
@ -761,7 +763,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
clrsetbits_le32(&power_regs->hw_power_vddioctrl, clrsetbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff); POWER_VDDIOCTRL_TRG_MASK, diff);
if (powered_by_linreg) if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500); early_delay(1500);
else { else {
while (!(readl(&power_regs->hw_power_sts) & while (!(readl(&power_regs->hw_power_sts) &
@ -819,7 +823,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
clrsetbits_le32(&power_regs->hw_power_vdddctrl, clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff); POWER_VDDDCTRL_TRG_MASK, diff);
if (powered_by_linreg) if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500); early_delay(1500);
else { else {
while (!(readl(&power_regs->hw_power_sts) & while (!(readl(&power_regs->hw_power_sts) &
@ -854,7 +860,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
clrsetbits_le32(&power_regs->hw_power_vdddctrl, clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff); POWER_VDDDCTRL_TRG_MASK, diff);
if (powered_by_linreg) if (powered_by_linreg ||
(readl(&power_regs->hw_power_sts) &
POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500); early_delay(1500);
else { else {
while (!(readl(&power_regs->hw_power_sts) & while (!(readl(&power_regs->hw_power_sts) &