ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4

Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Steve Sakoman 2010-08-25 13:22:44 -07:00 committed by Sandeep Paulraj
parent 0c0a0e0781
commit 543431b66d
3 changed files with 5 additions and 1 deletions

View File

@ -27,10 +27,12 @@
reset_cpu: reset_cpu:
ldr r1, rstctl @ get addr for global reset ldr r1, rstctl @ get addr for global reset
@ reg @ reg
mov r3, #0x2 @ full reset pll + mpu ldr r3, rstbit @ sw reset bit
str r3, [r1] @ force reset str r3, [r1] @ force reset
mov r0, r0 mov r0, r0
_loop_forever: _loop_forever:
b _loop_forever b _loop_forever
rstctl: rstctl:
.word PRM_RSTCTRL .word PRM_RSTCTRL
rstbit:
.word PRM_RSTCTRL_RESET

View File

@ -419,6 +419,7 @@ struct prm {
}; };
#else /* __ASSEMBLY__ */ #else /* __ASSEMBLY__ */
#define PRM_RSTCTRL 0x48307250 #define PRM_RSTCTRL 0x48307250
#define PRM_RSTCTRL_RESET 0x04
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __KERNEL_STRICT_NAMES */ #endif /* __KERNEL_STRICT_NAMES */

View File

@ -88,6 +88,7 @@
#define PRM_DEVICE_BASE (PRM_BASE + 0x1B00) #define PRM_DEVICE_BASE (PRM_BASE + 0x1B00)
#define PRM_RSTCTRL PRM_DEVICE_BASE #define PRM_RSTCTRL PRM_DEVICE_BASE
#define PRM_RSTCTRL_RESET 0x01
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__