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ppc4xx: Remove check for PPC460EX from CompactCenter

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Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach 2009-07-30 09:36:33 +02:00 committed by Stefan Roese
parent c3fa4f0c86
commit 56bdfa9612
1 changed files with 9 additions and 17 deletions
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26
board/gdsys/compactcenter/compactcenter.c
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@ -41,8 +41,6 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void) int board_early_init_f(void)
{ {
u32 pvr = get_pvr();
/* /*
* Setup the interrupt controller polarities, triggers, etc. * Setup the interrupt controller polarities, triggers, etc.
*/ */
@ -95,16 +93,14 @@ int board_early_init_f(void)
mtdcr(AHB_TOP, 0x8000004B); mtdcr(AHB_TOP, 0x8000004B);
mtdcr(AHB_BOT, 0x8000004B); mtdcr(AHB_BOT, 0x8000004B);
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) { /*
/* * Configure USB-STP pins as alternate and not GPIO
* Configure USB-STP pins as alternate and not GPIO * It seems to be neccessary to configure the STP pins as GPIO
* It seems to be neccessary to configure the STP pins as GPIO * input at powerup (perhaps while USB reset is asserted). So
* input at powerup (perhaps while USB reset is asserted). So * we configure those pins to their "real" function now.
* we configure those pins to their "real" function now. */
*/ gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1); gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
}
/* Trigger board component reset */ /* Trigger board component reset */
out_le16((void *)CONFIG_SYS_IO_BASE, 0xffff); out_le16((void *)CONFIG_SYS_IO_BASE, 0xffff);
@ -250,7 +246,6 @@ int misc_init_r(void)
{ {
u32 sdr0_srst1 = 0; u32 sdr0_srst1 = 0;
u32 eth_cfg; u32 eth_cfg;
u32 pvr = get_pvr();
/* /*
* Set EMAC mode/configuration (GMII, SGMII, RGMII...). * Set EMAC mode/configuration (GMII, SGMII, RGMII...).
@ -264,10 +259,7 @@ int misc_init_r(void)
/* Set the for 2 RGMII mode */ /* Set the for 2 RGMII mode */
/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */ /* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL; eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
else
eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
mtsdr(SDR0_ETH_CFG, eth_cfg); mtsdr(SDR0_ETH_CFG, eth_cfg);
/* /*