diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 22a9c1bff..a4fc1ec0a 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -313,7 +313,7 @@ relocate_code:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	addu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 addu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S
index bc7e41eed..aed82e1f0 100644
--- a/arch/mips/cpu/mips64/start.S
+++ b/arch/mips/cpu/mips64/start.S
@@ -192,7 +192,7 @@ relocate_code:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	daddu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 daddu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 3a8280cb0..194d7452e 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -87,7 +87,7 @@ relocate_code:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	addu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 addu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */