minix/u-boot
1
0
Fork 0
mirror of https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git synced 2025-09-10 12:39:22 -04:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'next' of git://git.denx.de/u-boot-video

Browse Source 
* 'next' of git://git.denx.de/u-boot-video:
  ipu_common: Add ldb_clk for use in parenting the pixel clock
  ipu_common: Do not hardcode the ipu_clk frequency
  ipu_common: Rename MXC_CCM_BASE
  ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
  ipu_common: Only apply the erratum to MX51
  video: Rename CONFIG_VIDEO_MX5
  mx6: Allow mx6 to access the IPUv3 registers
  common lcd: minor coding style changes

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2012-07-18 10:47:03 +02:00
commit 66714b1a6d
11 changed files with 166 additions and 135 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/include/asm/arch-mx5/imx-regs.h
View File

@ -50,8 +50,6 @@
#error "CPU_TYPE not defined"
#endif
#define IPU_CTRL_BASE_ADDR IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET
#define IRAM_SIZE 0x00020000 /* 128 KB */
/*

3
arch/arm/include/asm/arch-mx6/imx-regs.h
View File

@ -73,6 +73,9 @@
#define MMDC1_ARB_BASE_ADDR 0x80000000
#define MMDC1_ARB_END_ADDR 0xFFFFFFFF
#define IPU_SOC_BASE_ADDR IPU1_ARB_BASE_ADDR
#define IPU_SOC_OFFSET 0x00200000
/* Defines for Blocks connected via AIPS (SkyBlue) */
#define ATZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR
#define ATZ2_BASE_ADDR AIPS2_ARB_BASE_ADDR

69
common/lcd.c
View File

@ -121,8 +121,7 @@ static inline void console_back (void)
}
lcd_putc_xy(console_col * VIDEO_FONT_WIDTH,
console_row * VIDEO_FONT_HEIGHT,
' ');
console_row * VIDEO_FONT_HEIGHT, ' ');
}
/*----------------------------------------------------------------------*/
@ -146,37 +145,37 @@ void lcd_putc (const char c)
{
if (!lcd_is_enabled) {
serial_putc(c);
return;
}
switch (c) {
case '\r': console_col = 0;
return;
case '\r':
console_col = 0;
case '\n': console_newline();
return;
case '\n':
console_newline();
return;
case '\t': /* Tab (8 chars alignment) */
console_col += 8;
console_col &= ~7;
if (console_col >= CONSOLE_COLS) {
if (console_col >= CONSOLE_COLS)
console_newline();
return;
case '\b':
console_back();
return;
default:
lcd_putc_xy(console_col * VIDEO_FONT_WIDTH,
console_row * VIDEO_FONT_HEIGHT, c);
if (++console_col >= CONSOLE_COLS)
console_newline();
}
return;
case '\b': console_back();
return;
default: lcd_putc_xy (console_col * VIDEO_FONT_WIDTH,
console_row * VIDEO_FONT_HEIGHT,
c);
if (++console_col >= CONSOLE_COLS) {
console_newline();
}
return;
}
/* NOTREACHED */
}
/*----------------------------------------------------------------------*/
@ -185,6 +184,7 @@ void lcd_puts (const char *s)
{
if (!lcd_is_enabled) {
serial_puts(s);
return;
}
@ -447,8 +447,8 @@ ulong lcd_setmem (ulong addr)
ulong size;
int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
debug ("LCD panel info: %d x %d, %d bit/pix\n",
panel_info.vl_col, panel_info.vl_row, NBITS (panel_info.vl_bpix) );
debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col,
panel_info.vl_row, NBITS(panel_info.vl_bpix));
size = line_length * panel_info.vl_row;
@ -460,7 +460,7 @@ ulong lcd_setmem (ulong addr)
debug("Reserving %ldk for LCD Framebuffer at: %08lx\n", size>>10, addr);
return (addr);
return addr;
}
/*----------------------------------------------------------------------*/
@ -633,6 +633,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
if (!((bmp->header.signature[0] == 'B') &&
(bmp->header.signature[1] == 'M'))) {
printf("Error: no valid bmp image at %lx\n", bmp_image);
return 1;
}
@ -646,6 +647,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
if ((bpix != 1) && (bpix != 8) && (bpix != 16) && (bpix != 32)) {
printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
bpix, bmp_bpix);
return 1;
}
@ -654,6 +656,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
bpix,
le16_to_cpu(bmp->header.bit_count));
return 1;
}
@ -709,8 +712,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
* specific.
*/
#if defined(CONFIG_MCC200)
if (bpix==1)
{
if (bpix == 1) {
width = ((width + 7) & ~7) >> 3;
x = ((x + 7) & ~7) >> 3;
pwidth= ((pwidth + 7) & ~7) >> 3;
@ -806,7 +808,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
};
return (0);
return 0;
}
#endif
@ -823,13 +825,15 @@ static void *lcd_logo (void)
addr = simple_strtoul (s, NULL, 16);
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
if ((s = getenv ("splashpos")) != NULL) {
s = getenv("splashpos");
if (s != NULL) {
if (s[0] == 'm')
x = BMP_ALIGN_CENTER;
else
x = simple_strtol(s, NULL, 0);
if ((s = strchr (s + 1, ',')) != NULL) {
s = strchr(s + 1, ',');
if (s != NULL) {
if (s[1] == 'm')
y = BMP_ALIGN_CENTER;
else
@ -848,9 +852,8 @@ static void *lcd_logo (void)
}
#endif
if (lcd_display_bitmap (addr, x, y) == 0) {
return ((void *)lcd_base);
}
if (lcd_display_bitmap(addr, x, y) == 0)
return (void *)lcd_base;
}
#endif /* CONFIG_SPLASH_SCREEN */
@ -863,9 +866,9 @@ static void *lcd_logo (void)
#endif /* CONFIG_LCD_INFO */
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
return ((void *)((ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length));
return (void *)((ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length);
#else
return ((void *)lcd_base);
return (void *)lcd_base;
#endif /* CONFIG_LCD_LOGO && !CONFIG_LCD_INFO_BELOW_LOGO */
}

2
drivers/video/Makefile
View File

@ -42,7 +42,7 @@ COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
COBJS-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
COBJS-$(CONFIG_VIDEO_SM501) += sm501.o

2
drivers/video/cfb_console.c
View File

@ -164,7 +164,7 @@
/*
* Defines for the i.MX31 driver (mx3fb.c)
*/
#if defined(CONFIG_VIDEO_MX3) || defined(CONFIG_VIDEO_MX5)
#if defined(CONFIG_VIDEO_MX3) || defined(CONFIG_VIDEO_IPUV3)
#define VIDEO_FB_16BPP_WORD_SWAP
#endif

23
drivers/video/ipu_common.c
View File

@ -163,6 +163,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
static int clk_ipu_enable(struct clk *clk)
{
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
u32 reg;
reg = __raw_readl(clk->enable_reg);
@ -178,12 +179,13 @@ static int clk_ipu_enable(struct clk *clk)
reg = __raw_readl(&mxc_ccm->clpcr);
reg &= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
__raw_writel(reg, &mxc_ccm->clpcr);
#endif
return 0;
}
static void clk_ipu_disable(struct clk *clk)
{
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
u32 reg;
reg = __raw_readl(clk->enable_reg);
@ -202,13 +204,14 @@ static void clk_ipu_disable(struct clk *clk)
reg = __raw_readl(&mxc_ccm->clpcr);
reg |= MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
__raw_writel(reg, &mxc_ccm->clpcr);
#endif
}
static struct clk ipu_clk = {
.name = "ipu_clk",
.rate = 133000000,
.enable_reg = (u32 *)(MXC_CCM_BASE +
.rate = CONFIG_IPUV3_CLK,
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR5)),
.enable_shift = MXC_CCM_CCGR5_CG5_OFFSET,
.enable = clk_ipu_enable,
@ -216,8 +219,15 @@ static struct clk ipu_clk = {
.usecount = 0,
};
static struct clk ldb_clk = {
.name = "ldb_clk",
.rate = 65000000,
.usecount = 0,
};
/* Globals */
struct clk *g_ipu_clk;
struct clk *g_ldb_clk;
unsigned char g_ipu_clk_enabled;
struct clk *g_di_clk[2];
struct clk *g_pixel_clk[2];
@ -340,7 +350,7 @@ static int ipu_pixel_clk_set_parent(struct clk *clk, struct clk *parent)
if (parent == g_ipu_clk)
di_gen &= ~DI_GEN_DI_CLK_EXT;
else if (!IS_ERR(g_di_clk[clk->id]) && parent == g_di_clk[clk->id])
else if (!IS_ERR(g_di_clk[clk->id]) && parent == g_ldb_clk)
di_gen |= DI_GEN_DI_CLK_EXT;
else
return -EINVAL;
@ -401,6 +411,7 @@ void ipu_reset(void)
int ipu_probe(void)
{
unsigned long ipu_base;
#if defined CONFIG_MX51
u32 temp;
u32 *reg_hsc_mcd = (u32 *)MIPI_HSC_BASE_ADDR;
@ -414,6 +425,7 @@ int ipu_probe(void)
temp = __raw_readl(reg_hsc_mxt_conf);
__raw_writel(temp | 0x10000, reg_hsc_mxt_conf);
#endif
ipu_base = IPU_CTRL_BASE_ADDR;
ipu_cpmem_base = (u32 *)(ipu_base + IPU_CPMEM_REG_BASE);
@ -424,7 +436,8 @@ int ipu_probe(void)
g_ipu_clk = &ipu_clk;
debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk));
g_ldb_clk = &ldb_clk;
debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk));
ipu_reset();
clk_set_parent(g_pixel_clk[0], g_ipu_clk);

3
drivers/video/ipu_disp.c
View File

@ -64,6 +64,7 @@ static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;
int g_di1_tvout;
extern struct clk *g_ipu_clk;
extern struct clk *g_ldb_clk;
extern struct clk *g_di_clk[2];
extern struct clk *g_pixel_clk[2];
@ -941,7 +942,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
udelay(10000);
}
}
clk_set_parent(g_pixel_clk[disp], g_di_clk[disp]);
clk_set_parent(g_pixel_clk[disp], g_ldb_clk);
} else {
if (clk_get_usecount(g_pixel_clk[disp]) != 0)
clk_set_parent(g_pixel_clk[disp], g_ipu_clk);

12
drivers/video/ipu_regs.h
View File

@ -47,14 +47,24 @@
#define IPU_SMFC_REG_BASE 0x00050000
#define IPU_DC_REG_BASE 0x00058000
#define IPU_DMFC_REG_BASE 0x00060000
#define IPU_VDI_REG_BASE 0x00680000
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
#define IPU_CPMEM_REG_BASE 0x01000000
#define IPU_LUT_REG_BASE 0x01020000
#define IPU_SRM_REG_BASE 0x01040000
#define IPU_TPM_REG_BASE 0x01060000
#define IPU_DC_TMPL_REG_BASE 0x01080000
#define IPU_ISP_TBPR_REG_BASE 0x010C0000
#define IPU_VDI_REG_BASE 0x00680000
#elif defined(CONFIG_MX6Q)
#define IPU_CPMEM_REG_BASE 0x00100000
#define IPU_LUT_REG_BASE 0x00120000
#define IPU_SRM_REG_BASE 0x00140000
#define IPU_TPM_REG_BASE 0x00160000
#define IPU_DC_TMPL_REG_BASE 0x00180000
#define IPU_ISP_TBPR_REG_BASE 0x001C0000
#endif
#define IPU_CTRL_BASE_ADDR (IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET)
extern u32 *ipu_dc_tmpl_reg;

3
include/configs/mx51evk.h
View File

@ -126,13 +126,14 @@
/* Framebuffer and LCD */
#define CONFIG_PREBOOT
#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 133000000
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

3
include/configs/mx53loco.h
View File

@ -219,12 +219,13 @@
/* Framebuffer and LCD */
#define CONFIG_PREBOOT
#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 133000000
#endif /* __CONFIG_H */

3
include/configs/vision2.h
View File

@ -212,12 +212,13 @@
*/
#define CONFIG_PREBOOT
#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_IPUV3_CLK 133000000
#endif /* __CONFIG_H */