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https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-10 12:39:22 -04:00
86xx: Cleanup MP support
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx * Introduce determine_mp_bootpg() helper. We'll need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. * Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to allow cmd_mp.c to build and work. In the future we should look at implementing all these functions. This could be common w/85xx if we use spin tables on 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -375,7 +375,7 @@ void board_reset(void)
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;
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;
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}
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}
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#if (CONFIG_NUM_CPUS > 1)
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#ifdef CONFIG_MP
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extern void cpu_mp_lmb_reserve(struct lmb *lmb);
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extern void cpu_mp_lmb_reserve(struct lmb *lmb);
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void board_lmb_reserve(struct lmb *lmb)
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void board_lmb_reserve(struct lmb *lmb)
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@ -414,7 +414,7 @@ void board_reset(void)
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#endif
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#endif
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}
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}
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#if (CONFIG_NUM_CPUS > 1)
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#ifdef CONFIG_MP
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extern void cpu_mp_lmb_reserve(struct lmb *lmb);
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extern void cpu_mp_lmb_reserve(struct lmb *lmb);
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void board_lmb_reserve(struct lmb *lmb)
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void board_lmb_reserve(struct lmb *lmb)
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@ -29,26 +29,23 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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LIB = $(obj)lib$(CPU).a
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START = start.o
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START = start.o
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SOBJS = cache.o
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ifneq ($(CONFIG_NUM_CPUS),1)
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SOBJS-y += cache.o
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COBJS-y += mp.o
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SOBJS-$(CONFIG_MP) += release.o
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SOBJS += release.o
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endif
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COBJS-y += traps.o
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COBJS-y += cpu.o
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COBJS-y += cpu.o
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COBJS-y += cpu_init.o
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COBJS-y += cpu_init.o
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COBJS-y += speed.o
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COBJS-y += interrupts.o
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COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
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COBJS-$(CONFIG_MPC8641) += ddr-8641.o
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# 8610 & 8641 are identical w/regards to DDR
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# 8610 & 8641 are identical w/regards to DDR
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COBJS-$(CONFIG_MPC8610) += ddr-8641.o
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COBJS-$(CONFIG_MPC8610) += ddr-8641.o
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COBJS-$(CONFIG_MPC8641) += ddr-8641.o
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COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
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COBJS-y += interrupts.o
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COBJS-$(CONFIG_MP) += mp.o
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COBJS-y += speed.o
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COBJS-y += traps.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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START := $(addprefix $(obj),$(START))
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START := $(addprefix $(obj),$(START))
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all: $(obj).depend $(START) $(LIB)
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all: $(obj).depend $(START) $(LIB)
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@ -31,7 +31,7 @@
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#include <mpc86xx.h>
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#include <mpc86xx.h>
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#include <asm/mmu.h>
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#include <asm/mmu.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_law.h>
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#include "mp.h"
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#include <asm/mp.h>
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void setup_bats(void);
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void setup_bats(void);
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@ -9,15 +9,15 @@
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#include <common.h>
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#include <common.h>
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#include <libfdt.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <fdt_support.h>
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#include "mp.h"
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#include <asm/mp.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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void ft_cpu_setup(void *blob, bd_t *bd)
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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{
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#if (CONFIG_NUM_CPUS > 1)
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#ifdef CONFIG_MP
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int off;
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int off;
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u32 bootpg;
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u32 bootpg = determine_mp_bootpg();
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#endif
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#endif
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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@ -48,13 +48,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
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"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
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"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
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#endif
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#endif
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#if (CONFIG_NUM_CPUS > 1)
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#ifdef CONFIG_MP
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/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
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if (gd->ram_size > 0xfffff000)
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bootpg = 0xfff00000;
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else
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bootpg = gd->ram_size - (1024 * 1024);
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/* Reserve the boot page so OSes dont use it */
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/* Reserve the boot page so OSes dont use it */
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off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
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off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
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if (off < 0)
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if (off < 0)
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@ -4,20 +4,45 @@
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#include <ioports.h>
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#include <ioports.h>
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#include <lmb.h>
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#include <lmb.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include "mp.h"
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#include <asm/mp.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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#if (CONFIG_NUM_CPUS > 1)
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int cpu_reset(int nr)
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void cpu_mp_lmb_reserve(struct lmb *lmb)
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{
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{
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u32 bootpg;
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/* dummy function so common/cmd_mp.c will build
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* should be implemented in the future, when cpu_release()
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* is supported. Be aware there may be a similiar bug
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* as exists on MPC85xx w/its PIC having a timing window
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* associated to resetting the core */
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return 1;
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}
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int cpu_status(int nr)
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{
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/* dummy function so common/cmd_mp.c will build */
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return 0;
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}
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int cpu_release(int nr, int argc, char *argv[])
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{
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/* dummy function so common/cmd_mp.c will build
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* should be implemented in the future */
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return 1;
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}
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u32 determine_mp_bootpg(void)
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{
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/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
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/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
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if ((u64)gd->ram_size > 0xfffff000)
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if ((u64)gd->ram_size > 0xfffff000)
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bootpg = 0xfff00000;
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return (0xfff00000);
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else
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bootpg = gd->ram_size - (1024 * 1024);
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return (gd->ram_size - (1024 * 1024));
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}
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void cpu_mp_lmb_reserve(struct lmb *lmb)
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{
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u32 bootpg = determine_mp_bootpg();
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/* tell u-boot we stole a page */
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/* tell u-boot we stole a page */
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lmb_reserve(lmb, bootpg, 4096);
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lmb_reserve(lmb, bootpg, 4096);
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@ -31,18 +56,9 @@ void setup_mp(void)
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{
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{
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extern ulong __secondary_start_page;
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extern ulong __secondary_start_page;
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ulong fixup = (ulong)&__secondary_start_page;
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ulong fixup = (ulong)&__secondary_start_page;
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u32 bootpg;
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u32 bootpg = determine_mp_bootpg();
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u32 bootpg_va;
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u32 bootpg_va;
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/*
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* If we have 4G or more of memory, put the boot page at 4Gb-1M.
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* Otherwise, put it at the very end of RAM.
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*/
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if (gd->ram_size > 0xfffff000)
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bootpg = 0xfff00000;
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else
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bootpg = gd->ram_size - (1024 * 1024);
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if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {
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if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {
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/* We're not covered by the DDR mapping, set up BAT */
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/* We're not covered by the DDR mapping, set up BAT */
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write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
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write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
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@ -65,4 +81,3 @@ void setup_mp(void)
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out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 |
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out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 |
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(bootpg >> 12));
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(bootpg >> 12));
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}
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}
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#endif
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@ -1,7 +0,0 @@
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#ifndef __MPC86XX_MP_H_
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#define __MPC86XX_MP_H_
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void setup_mp(void);
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void cpu_mp_lmb_reserve(struct lmb *lmb);
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#endif
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@ -41,7 +41,6 @@
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* Core 0 must copy this to a 1M aligned region and set BPTR
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* Core 0 must copy this to a 1M aligned region and set BPTR
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* to point to it.
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* to point to it.
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*/
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*/
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#if (CONFIG_NUM_CPUS > 1)
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.align 12
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.align 12
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.globl __secondary_start_page
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.globl __secondary_start_page
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__secondary_start_page:
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__secondary_start_page:
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@ -166,4 +165,3 @@ invl2:
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blr
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blr
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/* Never Returns, Running in Linux Now */
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/* Never Returns, Running in Linux Now */
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#endif
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31
include/asm-ppc/mp.h
Normal file
31
include/asm-ppc/mp.h
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@ -0,0 +1,31 @@
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/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef _ASM_MP_H_
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#define _ASM_MP_H_
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#include <lmb.h>
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void setup_mp(void);
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void cpu_mp_lmb_reserve(struct lmb *lmb);
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u32 determine_mp_bootpg(void);
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#endif
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@ -36,6 +36,7 @@
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#define CONFIG_MPC86xx 1 /* MPC86xx */
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#define CONFIG_MPC86xx 1 /* MPC86xx */
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#define CONFIG_MPC8641 1 /* MPC8641 specific */
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#define CONFIG_MPC8641 1 /* MPC8641 specific */
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#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
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#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
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#define CONFIG_MP 1 /* support multiple processors */
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#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
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#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
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#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
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#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
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/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
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/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
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@ -40,6 +40,7 @@
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#define CONFIG_MPC86xx 1 /* MPC86xx */
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#define CONFIG_MPC86xx 1 /* MPC86xx */
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#define CONFIG_MPC8641 1 /* MPC8641 specific */
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#define CONFIG_MPC8641 1 /* MPC8641 specific */
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#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
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#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
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#define CONFIG_MP 1 /* support multiple processors */
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#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
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#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
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#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
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#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
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