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85xx: Add L2SRAM Register's macro definition
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -330,11 +330,12 @@ int cpu_init_r(void)
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break;
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break;
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}
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}
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if (l2cache->l2ctl & 0x80000000) {
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) {
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puts("already enabled");
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puts("already enabled");
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l2srbar = l2cache->l2srbar0;
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l2srbar = l2cache->l2srbar0;
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#ifdef CONFIG_SYS_INIT_L2_ADDR
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#ifdef CONFIG_SYS_INIT_L2_ADDR
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if (l2cache->l2ctl & 0x00010000 && l2srbar >= CONFIG_SYS_FLASH_BASE) {
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE
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&& l2srbar >= CONFIG_SYS_FLASH_BASE) {
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l2srbar = CONFIG_SYS_INIT_L2_ADDR;
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l2srbar = CONFIG_SYS_INIT_L2_ADDR;
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l2cache->l2srbar0 = l2srbar;
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l2cache->l2srbar0 = l2srbar;
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printf("moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR);
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printf("moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR);
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@ -411,6 +411,11 @@ typedef struct ccsr_l2cache {
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char res15[420];
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char res15[420];
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} ccsr_l2cache_t;
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} ccsr_l2cache_t;
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#define MPC85xx_L2CTL_L2E 0x80000000
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#define MPC85xx_L2CTL_L2SRAM_ENTIRE 0x00010000
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#define MPC85xx_L2ERRDIS_MBECC 0x00000008
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#define MPC85xx_L2ERRDIS_SBECC 0x00000004
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/*
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/*
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* DMA Registers(0x2_1000-0x2_2000)
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* DMA Registers(0x2_1000-0x2_2000)
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*/
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*/
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