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at91rm9200: fix broken boot from nor flash

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This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if
CONFIG_AT91RM9200 is defined and nor preloader is used.

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
This commit is contained in:
Jens Scharsig 2008-11-18 10:48:46 +01:00 committed by Jean-Christophe PLAGNIOL-VILLARD
parent 3e0cda071a
commit 8052352f20
6 changed files with 11 additions and 4 deletions
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5
cpu/arm920t/start.S
View File

@ -24,7 +24,6 @@
* MA 02111-1307 USA * MA 02111-1307 USA
*/ */
#include <config.h> #include <config.h>
#include <version.h> #include <version.h>
#include <status_led.h> #include <status_led.h>
@ -178,8 +177,6 @@ copyex:
bl cpu_init_crit bl cpu_init_crit
#endif #endif
#ifndef CONFIG_AT91RM9200
#ifndef CONFIG_SKIP_RELOCATE_UBOOT #ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */ relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */ adr r0, _start /* r0 <- current position of code */
@ -198,7 +195,7 @@ copy_loop:
cmp r0, r2 /* until source end addreee [r2] */ cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
#endif
/* Set up the stack */ /* Set up the stack */
stack_setup: stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */

2
include/configs/at91rm9200dk.h
View File

@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/* /*
* Size of malloc() pool * Size of malloc() pool

2
include/configs/cmc_pu2.h
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@ -71,6 +71,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/* /*

2
include/configs/csb637.h
View File

@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/* /*
* Size of malloc() pool * Size of malloc() pool

2
include/configs/kb9202.h
View File

@ -51,6 +51,8 @@
#define CONFIG_INITRD_TAG 1 #define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
/* NOR flash without preloader */
#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_LONGHELP

2
include/configs/mp2usb.h
View File

@ -76,6 +76,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/* /*