mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-09 03:58:18 -04:00
ARMV7: Add support For Logic OMAP35x/DM37x modules
This patch adds basic support for OMAP35x/DM37x SOM LV/Torpedo reference boards. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. Signed-off-by: Peter Barada <peter.barada@logicpd.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
This commit is contained in:
Peter Barada
Albert ARIBAUD
parent
a601bed065
commit
86887f8ea1
@ -41,6 +41,10 @@ Reinhard Arlt <reinhard.arlt@esd-electronics.com>
|
|||||||
|
|
||||||
CPCI750 PPC750FX/GX
|
CPCI750 PPC750FX/GX
|
||||||
|
|
||||||
|
Peter Barada <peter.barada@logicpd.com>
|
||||||
|
|
||||||
|
omap3_logic ARM ARMV7 (Logic OMAP35xx/DM37xx)
|
||||||
|
|
||||||
Yuli Barcohen <yuli@arabellasw.com>
|
Yuli Barcohen <yuli@arabellasw.com>
|
||||||
|
|
||||||
Adder MPC87x/MPC852T
|
Adder MPC87x/MPC852T
|
||||||
|
|||||||
42
board/logicpd/omap3som/Makefile
Normal file
42
board/logicpd/omap3som/Makefile
Normal file
@ -0,0 +1,42 @@
|
|||||||
|
#
|
||||||
|
# (C) Copyright 2000, 2001, 2002
|
||||||
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||||
|
#
|
||||||
|
# See file CREDITS for list of people who contributed to this
|
||||||
|
# project.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or
|
||||||
|
# modify it under the terms of the GNU General Public License as
|
||||||
|
# published by the Free Software Foundation; either version 2 of
|
||||||
|
# the License, or (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program; if not, write to the Free Software
|
||||||
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
# MA 02111-1307 USA
|
||||||
|
#
|
||||||
|
|
||||||
|
include $(TOPDIR)/config.mk
|
||||||
|
|
||||||
|
LIB = $(obj)lib$(BOARD).o
|
||||||
|
|
||||||
|
COBJS-y := omap3logic.o
|
||||||
|
|
||||||
|
COBJS := $(sort $(COBJS-y))
|
||||||
|
SRCS := $(COBJS:.o=.c)
|
||||||
|
OBJS := $(addprefix $(obj),$(COBJS))
|
||||||
|
|
||||||
|
$(LIB): $(obj).depend $(OBJS)
|
||||||
|
$(call cmd_link_o_target, $(OBJS))
|
||||||
|
|
||||||
|
#########################################################################
|
||||||
|
|
||||||
|
# defines $(obj).depend target
|
||||||
|
include $(SRCTREE)/rules.mk
|
||||||
|
|
||||||
|
sinclude $(obj).depend
|
||||||
247
board/logicpd/omap3som/omap3logic.c
Normal file
247
board/logicpd/omap3som/omap3logic.c
Normal file
@ -0,0 +1,247 @@
|
|||||||
|
/*
|
||||||
|
* (C) Copyright 2011
|
||||||
|
* Logic Product Development <www.logicpd.com>
|
||||||
|
*
|
||||||
|
* Author :
|
||||||
|
* Peter Barada <peter.barada@logicpd.com>
|
||||||
|
*
|
||||||
|
* Derived from Beagle Board and 3430 SDP code by
|
||||||
|
* Richard Woodruff <r-woodruff2@ti.com>
|
||||||
|
* Syed Mohammed Khasim <khasim@ti.com>
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
#include <common.h>
|
||||||
|
#include <netdev.h>
|
||||||
|
#include <flash.h>
|
||||||
|
#include <nand.h>
|
||||||
|
#include <i2c.h>
|
||||||
|
#include <twl4030.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
#include <asm/arch/mmc_host_def.h>
|
||||||
|
#include <asm/arch/mux.h>
|
||||||
|
#include <asm/arch/mem.h>
|
||||||
|
#include <asm/arch/sys_proto.h>
|
||||||
|
#include <asm/gpio.h>
|
||||||
|
#include <asm/mach-types.h>
|
||||||
|
#include "omap3logic.h"
|
||||||
|
|
||||||
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* two dimensional array of strucures containining board name and Linux
|
||||||
|
* machine IDs; row it selected based on CPU column is slected based
|
||||||
|
* on hsusb0_data5 pin having a pulldown resistor
|
||||||
|
*/
|
||||||
|
static struct board_id {
|
||||||
|
char *name;
|
||||||
|
int machine_id;
|
||||||
|
} boards[2][2] = {
|
||||||
|
{
|
||||||
|
{
|
||||||
|
.name = "OMAP35xx SOM LV",
|
||||||
|
.machine_id = MACH_TYPE_OMAP3530_LV_SOM,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "OMAP35xx Torpedo",
|
||||||
|
.machine_id = MACH_TYPE_OMAP3_TORPEDO,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
{
|
||||||
|
{
|
||||||
|
.name = "DM37xx SOM LV",
|
||||||
|
.machine_id = MACH_TYPE_DM3730_SOM_LV,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "DM37xx Torpedo",
|
||||||
|
.machine_id = MACH_TYPE_DM3730_TORPEDO,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV
|
||||||
|
*/
|
||||||
|
#define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Routine: board_init
|
||||||
|
* Description: Early hardware init.
|
||||||
|
*/
|
||||||
|
int board_init(void)
|
||||||
|
{
|
||||||
|
struct board_id *board;
|
||||||
|
unsigned int val;
|
||||||
|
|
||||||
|
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
|
||||||
|
|
||||||
|
/* boot param addr */
|
||||||
|
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* To identify between a SOM LV and Torpedo module,
|
||||||
|
* a pulldown resistor is on hsusb0_data5 for the SOM LV module.
|
||||||
|
* Drive the pin (and let it soak), then read it back.
|
||||||
|
* If the pin is still high its a Torpedo. If low its a SOM LV
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Mux hsusb0_data5 as a GPIO */
|
||||||
|
MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4));
|
||||||
|
|
||||||
|
if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) {
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV
|
||||||
|
* will drain the voltage.
|
||||||
|
*/
|
||||||
|
gpio_direction_output(BOARD_ID_GPIO, 0);
|
||||||
|
gpio_set_value(BOARD_ID_GPIO, 1);
|
||||||
|
|
||||||
|
/* Let it soak for a bit */
|
||||||
|
sdelay(0x100);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Read state of BOARD_ID_GPIO as an input and if its set.
|
||||||
|
* If so the board is a Torpedo
|
||||||
|
*/
|
||||||
|
gpio_direction_input(BOARD_ID_GPIO);
|
||||||
|
val = gpio_get_value(BOARD_ID_GPIO);
|
||||||
|
gpio_free(BOARD_ID_GPIO);
|
||||||
|
|
||||||
|
board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val];
|
||||||
|
printf("Board: %s\n", board->name);
|
||||||
|
|
||||||
|
/* Set the machine_id passed to Linux */
|
||||||
|
gd->bd->bi_arch_number = board->machine_id;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* restore hsusb0_data5 pin as hsusb0_data5 */
|
||||||
|
MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0));
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
|
||||||
|
int board_mmc_init(bd_t *bis)
|
||||||
|
{
|
||||||
|
return omap_mmc_init(0);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Routine: misc_init_r
|
||||||
|
* Description: display die ID register
|
||||||
|
*/
|
||||||
|
int misc_init_r(void)
|
||||||
|
{
|
||||||
|
dieid_num_r();
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_SMC911X
|
||||||
|
/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
|
||||||
|
static const u32 gpmc_lan92xx_config[] = {
|
||||||
|
NET_LAN92XX_GPMC_CONFIG1,
|
||||||
|
NET_LAN92XX_GPMC_CONFIG2,
|
||||||
|
NET_LAN92XX_GPMC_CONFIG3,
|
||||||
|
NET_LAN92XX_GPMC_CONFIG4,
|
||||||
|
NET_LAN92XX_GPMC_CONFIG5,
|
||||||
|
NET_LAN92XX_GPMC_CONFIG6,
|
||||||
|
};
|
||||||
|
|
||||||
|
int board_eth_init(bd_t *bis)
|
||||||
|
{
|
||||||
|
enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
|
||||||
|
CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
|
||||||
|
|
||||||
|
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* IEN - Input Enable
|
||||||
|
* IDIS - Input Disable
|
||||||
|
* PTD - Pull type Down
|
||||||
|
* PTU - Pull type Up
|
||||||
|
* DIS - Pull type selection is inactive
|
||||||
|
* EN - Pull type selection is active
|
||||||
|
* M0 - Mode 0
|
||||||
|
* The commented string gives the final mux configuration for that pin
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Routine: set_muxconf_regs
|
||||||
|
* Description: Setting up the configuration Mux registers specific to the
|
||||||
|
* hardware. Many pins need to be moved from protect to primary
|
||||||
|
* mode.
|
||||||
|
*/
|
||||||
|
void set_muxconf_regs(void)
|
||||||
|
{
|
||||||
|
/*GPMC*/
|
||||||
|
MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4));
|
||||||
|
MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/
|
||||||
|
MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0));
|
||||||
|
|
||||||
|
/*Expansion card */
|
||||||
|
MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0));
|
||||||
|
|
||||||
|
/* Serial Console */
|
||||||
|
MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0));
|
||||||
|
MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0));
|
||||||
|
|
||||||
|
/* I2C */
|
||||||
|
MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0));
|
||||||
|
|
||||||
|
MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0));
|
||||||
|
|
||||||
|
/*Control and debug */
|
||||||
|
MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0));
|
||||||
|
MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0));
|
||||||
|
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0));
|
||||||
|
}
|
||||||
47
board/logicpd/omap3som/omap3logic.h
Normal file
47
board/logicpd/omap3som/omap3logic.h
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
/*
|
||||||
|
* (C) Copyright 2011
|
||||||
|
* Logic Product Development <www.logicpd.com>
|
||||||
|
*
|
||||||
|
* Author:
|
||||||
|
* Peter Barada <peter.barada@logicpd.com>
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
#ifndef _OMAP3LOGIC_H_
|
||||||
|
#define _OMAP3LOGIC_H_
|
||||||
|
|
||||||
|
/*
|
||||||
|
* OMAP3 GPMC register settings for CS1 LAN922x
|
||||||
|
*/
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG1 0x00001000
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG2 0x00080801
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG3 0x00000000
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG4 0x08010801
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG5 0x00080a0a
|
||||||
|
#define NET_LAN92XX_GPMC_CONFIG6 0x03000280
|
||||||
|
|
||||||
|
|
||||||
|
const omap3_sysinfo sysinfo = {
|
||||||
|
DDR_DISCRETE,
|
||||||
|
"Logic DM37x/OMAP35x reference board",
|
||||||
|
"NAND",
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
@ -204,6 +204,7 @@ igep0030 arm armv7 igep0030 isee
|
|||||||
am3517_evm arm armv7 am3517evm logicpd omap3
|
am3517_evm arm armv7 am3517evm logicpd omap3
|
||||||
omap3_zoom1 arm armv7 zoom1 logicpd omap3
|
omap3_zoom1 arm armv7 zoom1 logicpd omap3
|
||||||
omap3_zoom2 arm armv7 zoom2 logicpd omap3
|
omap3_zoom2 arm armv7 zoom2 logicpd omap3
|
||||||
|
omap3_logic arm armv7 omap3som logicpd omap3
|
||||||
omap3_mvblx arm armv7 mvblx matrix_vision omap3
|
omap3_mvblx arm armv7 mvblx matrix_vision omap3
|
||||||
am3517_crane arm armv7 am3517crane ti omap3
|
am3517_crane arm armv7 am3517crane ti omap3
|
||||||
omap3_beagle arm armv7 beagle ti omap3
|
omap3_beagle arm armv7 beagle ti omap3
|
||||||
|
|||||||
362
include/configs/omap3_logic.h
Normal file
362
include/configs/omap3_logic.h
Normal file
@ -0,0 +1,362 @@
|
|||||||
|
/*
|
||||||
|
* (C) Copyright 2011 Logic Product Development <www.logicpd.com>
|
||||||
|
* Peter Barada <peter.barada@logicpd.com>
|
||||||
|
*
|
||||||
|
* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
|
||||||
|
* reference boards.
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __CONFIG_H
|
||||||
|
#define __CONFIG_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
* High Level Configuration Options
|
||||||
|
*/
|
||||||
|
#define CONFIG_OMAP /* in a TI OMAP core */
|
||||||
|
#define CONFIG_OMAP34XX /* which is a 34XX */
|
||||||
|
#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
|
||||||
|
|
||||||
|
#undef CONFIG_USE_IRQ /* no support for IRQs */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_TEXT_BASE 0x80400000
|
||||||
|
|
||||||
|
#define CONFIG_SDRC /* The chip has SDRC controller */
|
||||||
|
|
||||||
|
#include <asm/arch/cpu.h> /* get chip and board defs */
|
||||||
|
#include <asm/arch/omap3.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Display CPU and Board information
|
||||||
|
*/
|
||||||
|
#define CONFIG_DISPLAY_CPUINFO
|
||||||
|
#define CONFIG_DISPLAY_BOARDINFO
|
||||||
|
|
||||||
|
/* Clock Defines */
|
||||||
|
#define V_OSCK 26000000 /* Clock output from T2 */
|
||||||
|
#define V_SCLK (V_OSCK >> 1)
|
||||||
|
|
||||||
|
#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
|
||||||
|
|
||||||
|
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
|
||||||
|
#define CONFIG_SETUP_MEMORY_TAGS
|
||||||
|
#define CONFIG_INITRD_TAG
|
||||||
|
#define CONFIG_REVISION_TAG
|
||||||
|
|
||||||
|
#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
|
||||||
|
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Size of malloc() pool
|
||||||
|
*/
|
||||||
|
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
|
||||||
|
/* Sector */
|
||||||
|
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Hardware drivers
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* NS16550 Configuration
|
||||||
|
*/
|
||||||
|
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_NS16550
|
||||||
|
#define CONFIG_SYS_NS16550_SERIAL
|
||||||
|
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||||
|
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
|
||||||
|
|
||||||
|
/*
|
||||||
|
* select serial console configuration
|
||||||
|
*/
|
||||||
|
#define CONFIG_CONS_INDEX 1
|
||||||
|
#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
|
||||||
|
#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
|
||||||
|
|
||||||
|
/* allow to overwrite serial and ethaddr */
|
||||||
|
#define CONFIG_ENV_OVERWRITE
|
||||||
|
#define CONFIG_BAUDRATE 115200
|
||||||
|
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
|
||||||
|
115200}
|
||||||
|
#define CONFIG_GENERIC_MMC
|
||||||
|
#define CONFIG_MMC
|
||||||
|
#define CONFIG_OMAP_HSMMC
|
||||||
|
#define CONFIG_DOS_PARTITION
|
||||||
|
|
||||||
|
/* commands to include */
|
||||||
|
#include <config_cmd_default.h>
|
||||||
|
|
||||||
|
#define CONFIG_CMD_CACHE
|
||||||
|
#define CONFIG_CMD_EXT2 /* EXT2 Support */
|
||||||
|
#define CONFIG_CMD_FAT /* FAT support */
|
||||||
|
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
|
||||||
|
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
|
||||||
|
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
|
||||||
|
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
|
||||||
|
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
|
||||||
|
"1920k(u-boot),128k(u-boot-env),"\
|
||||||
|
"4m(kernel),-(fs)"
|
||||||
|
|
||||||
|
#define CONFIG_CMD_I2C /* I2C serial bus support */
|
||||||
|
#define CONFIG_CMD_MMC /* MMC support */
|
||||||
|
#define CONFIG_CMD_NAND /* NAND support */
|
||||||
|
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
|
||||||
|
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
|
||||||
|
#define CONFIG_CMD_PING
|
||||||
|
#define CONFIG_CMD_DHCP
|
||||||
|
#define CONFIG_CMD_SETECPR /* Evaluate expressions */
|
||||||
|
|
||||||
|
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
|
||||||
|
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
|
||||||
|
#undef CONFIG_CMD_IMI /* iminfo */
|
||||||
|
#undef CONFIG_CMD_IMLS /* List all found images */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_NO_FLASH
|
||||||
|
|
||||||
|
/*
|
||||||
|
* I2C
|
||||||
|
*/
|
||||||
|
#define CONFIG_HARD_I2C
|
||||||
|
#define CONFIG_DRIVER_OMAP34XX_I2C
|
||||||
|
|
||||||
|
#define CONFIG_SYS_I2C_SPEED 100000
|
||||||
|
#define CONFIG_SYS_I2C_SLAVE 1
|
||||||
|
#define CONFIG_SYS_I2C_BUS 0
|
||||||
|
#define CONFIG_SYS_I2C_BUS_SELECT 1
|
||||||
|
#define CONFIG_I2C_MULTI_BUS
|
||||||
|
|
||||||
|
/*
|
||||||
|
* TWL4030
|
||||||
|
*/
|
||||||
|
#define CONFIG_TWL4030_POWER
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Board NAND Info.
|
||||||
|
*/
|
||||||
|
#define CONFIG_SYS_NAND_QUIET_TEST
|
||||||
|
#define CONFIG_NAND_OMAP_GPMC
|
||||||
|
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
|
||||||
|
/* to access nand */
|
||||||
|
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
|
||||||
|
/* to access nand at */
|
||||||
|
/* CS0 */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
|
||||||
|
/* NAND devices */
|
||||||
|
#define CONFIG_JFFS2_NAND
|
||||||
|
/* nand device jffs2 lives on */
|
||||||
|
#define CONFIG_JFFS2_DEV "nand0"
|
||||||
|
/* start of jffs2 partition */
|
||||||
|
#define CONFIG_JFFS2_PART_OFFSET 0x680000
|
||||||
|
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
|
||||||
|
/* partition */
|
||||||
|
|
||||||
|
/* Environment information */
|
||||||
|
#define CONFIG_BOOTDELAY 2
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PREBOOT assumes the 4.3" display is attached. User can interrupt
|
||||||
|
* and modify display variable to suit their needs.
|
||||||
|
*/
|
||||||
|
#define CONFIG_PREBOOT \
|
||||||
|
"echo ======================NOTICE============================;"\
|
||||||
|
"echo \"The u-boot environment is not set.\";" \
|
||||||
|
"echo \"If using a display a valid display varible for your panel\";" \
|
||||||
|
"echo \"needs to be set.\";" \
|
||||||
|
"echo \"Valid display options are:\";" \
|
||||||
|
"echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
|
||||||
|
"echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
|
||||||
|
"echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
|
||||||
|
"echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
|
||||||
|
"echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
|
||||||
|
"echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
|
||||||
|
"echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
|
||||||
|
"echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
|
||||||
|
"echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
|
||||||
|
"echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
|
||||||
|
"setenv display 15;" \
|
||||||
|
"setenv preboot;" \
|
||||||
|
"saveenv;"
|
||||||
|
|
||||||
|
|
||||||
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
|
"loadaddr=0x81000000\0" \
|
||||||
|
"bootfile=uImage\0" \
|
||||||
|
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||||
|
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||||
|
"mmcdev=0\0" \
|
||||||
|
"autoboot=if mmc rescan ${mmcdev}; then " \
|
||||||
|
"if run loadbootscript; then " \
|
||||||
|
"run bootscript; " \
|
||||||
|
"else " \
|
||||||
|
"run defaultboot;" \
|
||||||
|
"fi; " \
|
||||||
|
"else run defaultboot; fi\0" \
|
||||||
|
"defaultboot=run mmcramboot\0" \
|
||||||
|
"consoledevice=ttyO0\0" \
|
||||||
|
"display=15\0" \
|
||||||
|
"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
|
||||||
|
"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
|
||||||
|
"rotation=0\0" \
|
||||||
|
"vrfb_arg=if itest ${rotation} -ne 0; then " \
|
||||||
|
"setenv bootargs ${bootargs} omapfb.vrfb=y " \
|
||||||
|
"omapfb.rotate=${rotation}; " \
|
||||||
|
"fi\0" \
|
||||||
|
"otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
|
||||||
|
"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||||
|
"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
|
||||||
|
"${otherbootargs};" \
|
||||||
|
"run addmtdparts; " \
|
||||||
|
"run vrfb_arg\0" \
|
||||||
|
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
|
||||||
|
"bootscript=echo 'Running bootscript from mmc ...'; " \
|
||||||
|
"source ${loadaddr}\0" \
|
||||||
|
"loaduimage=mmc rescan ${mmcdev}; " \
|
||||||
|
"fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
|
||||||
|
"ramdisksize=64000\0" \
|
||||||
|
"ramdiskaddr=0x82000000\0" \
|
||||||
|
"ramdiskimage=rootfs.ext2.gz.uboot\0" \
|
||||||
|
"ramargs=run setconsole; setenv bootargs console=${console} " \
|
||||||
|
"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
|
||||||
|
"mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
|
||||||
|
"run ramargs; " \
|
||||||
|
"run common_bootargs; " \
|
||||||
|
"run dump_bootargs; " \
|
||||||
|
"run loaduimage; " \
|
||||||
|
"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
|
||||||
|
"bootm ${loadaddr} ${ramdiskaddr}\0" \
|
||||||
|
"ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
|
||||||
|
"run ramargs; " \
|
||||||
|
"run common_bootargs; " \
|
||||||
|
"run dump_bootargs; " \
|
||||||
|
"tftpboot ${loadaddr} ${bootfile}; "\
|
||||||
|
"tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
|
||||||
|
"bootm ${loadaddr} ${ramdiskaddr}\0"
|
||||||
|
|
||||||
|
#define CONFIG_BOOTCOMMAND \
|
||||||
|
"run autoboot"
|
||||||
|
|
||||||
|
#define CONFIG_AUTO_COMPLETE
|
||||||
|
/*
|
||||||
|
* Miscellaneous configurable options
|
||||||
|
*/
|
||||||
|
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||||
|
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
||||||
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||||
|
#define CONFIG_SYS_PROMPT "OMAP Logic # "
|
||||||
|
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||||
|
/* Print Buffer Size */
|
||||||
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||||
|
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||||
|
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||||
|
/* Boot Argument Buffer Size */
|
||||||
|
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
|
||||||
|
/* memtest works on */
|
||||||
|
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
|
||||||
|
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
|
||||||
|
0x01F00000) /* 31MB */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
|
||||||
|
/* address */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* OMAP3 has 12 GP timers, they can be driven by the system clock
|
||||||
|
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
|
||||||
|
* This rate is divided by a local divisor.
|
||||||
|
*/
|
||||||
|
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
|
||||||
|
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
||||||
|
#define CONFIG_SYS_HZ 1000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Stack sizes
|
||||||
|
*
|
||||||
|
* The stack sizes are set up in start.S using the settings below
|
||||||
|
*/
|
||||||
|
#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Physical Memory Map
|
||||||
|
*/
|
||||||
|
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
|
||||||
|
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
|
||||||
|
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FLASH and environment organization
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* **** PISMO SUPPORT *** */
|
||||||
|
|
||||||
|
/* Configure the PISMO */
|
||||||
|
#define PISMO1_NAND_SIZE GPMC_SIZE_128M
|
||||||
|
|
||||||
|
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
|
||||||
|
|
||||||
|
#if defined(CONFIG_CMD_NAND)
|
||||||
|
#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
|
||||||
|
#elif defined(CONFIG_CMD_ONENAND)
|
||||||
|
#define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Monitor at start of flash */
|
||||||
|
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||||
|
|
||||||
|
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||||
|
|
||||||
|
#if defined(CONFIG_CMD_NAND)
|
||||||
|
#define CONFIG_NAND_OMAP_GPMC
|
||||||
|
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
|
||||||
|
#define CONFIG_ENV_IS_IN_NAND
|
||||||
|
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
|
||||||
|
#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
|
||||||
|
|
||||||
|
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||||
|
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
|
||||||
|
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
|
||||||
|
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
|
||||||
|
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||||
|
GENERATED_GBL_DATA_SIZE)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SMSC922x Ethernet
|
||||||
|
*/
|
||||||
|
#if defined(CONFIG_CMD_NET)
|
||||||
|
|
||||||
|
#define CONFIG_SMC911X
|
||||||
|
#define CONFIG_SMC911X_16_BIT
|
||||||
|
#define CONFIG_SMC911X_BASE 0x08000000
|
||||||
|
|
||||||
|
#endif /* (CONFIG_CMD_NET) */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* BOOTP fields
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CONFIG_BOOTP_SUBNETMASK 0x00000001
|
||||||
|
#define CONFIG_BOOTP_GATEWAY 0x00000002
|
||||||
|
#define CONFIG_BOOTP_HOSTNAME 0x00000004
|
||||||
|
#define CONFIG_BOOTP_BOOTPATH 0x00000010
|
||||||
|
|
||||||
|
#endif /* __CONFIG_H */
|
||||||
Loading…
x
Reference in New Issue
Block a user