mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-11 13:08:31 -04:00
ata_piix: Fix checkpatch issues
While in here also: - Switch to debug from custom PRINTF for debugging. - Use mdelay rather than custom msleep. Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
parent
e5f24753c9
commit
879a57ac0e
@ -63,13 +63,13 @@ extern int sata_curr_device;
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#define PORT_ENABLED (1<<4)
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#define PORT_ENABLED (1<<4)
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u32 bdf;
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u32 bdf;
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u32 iobase1 = 0; /*Primary cmd block */
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u32 iobase1; /* Primary cmd block */
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u32 iobase2 = 0; /*Primary ctl block */
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u32 iobase2; /* Primary ctl block */
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u32 iobase3 = 0; /*Sec cmd block */
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u32 iobase3; /* Sec cmd block */
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u32 iobase4 = 0; /*sec ctl block */
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u32 iobase4; /* sec ctl block */
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u32 iobase5 = 0; /*BMDMA*/
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u32 iobase5; /* BMDMA*/
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int
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pci_sata_init (void)
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int pci_sata_init(void)
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{
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{
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u32 bus = PCI_SATA_BUS;
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u32 bus = PCI_SATA_BUS;
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u32 dev = PCI_SATA_DEV;
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u32 dev = PCI_SATA_DEV;
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@ -89,9 +89,10 @@ pci_sata_init (void)
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if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
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if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
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(iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
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(iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
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(iobase5 == 0xFFFFFFFF)) {
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(iobase5 == 0xFFFFFFFF)) {
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/* ERROR */
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printf("error no base addr for SATA controller\n");
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printf("error no base addr for SATA controller\n");
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return 1;
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return 1;
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/*ERROR*/}
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}
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iobase1 &= 0xFFFFFFFE;
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iobase1 &= 0xFFFFFFFE;
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iobase2 &= 0xFFFFFFFE;
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iobase2 &= 0xFFFFFFFE;
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@ -102,17 +103,16 @@ pci_sata_init (void)
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/* check for mode */
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/* check for mode */
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pci_read_config_byte(bdf, PCI_PMR, &pmr);
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pci_read_config_byte(bdf, PCI_PMR, &pmr);
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if (pmr > 1) {
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if (pmr > 1) {
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printf ("combined mode not supported\n");
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puts("combined mode not supported\n");
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return 1;
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return 1;
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}
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}
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pci_read_config_byte(bdf, PCI_PI, &pi);
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pci_read_config_byte(bdf, PCI_PI, &pi);
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if ((pi & 0x05) != 0x05) {
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if ((pi & 0x05) != 0x05) {
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printf ("Sata is in Legacy mode\n");
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puts("Sata is in Legacy mode\n");
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return 1;
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return 1;
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} else {
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} else
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printf ("sata is in Native mode\n");
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puts("sata is in Native mode\n");
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}
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/* MASTER CFG AND IO CFG */
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/* MASTER CFG AND IO CFG */
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pci_read_config_word(bdf, PCI_COMMAND, &cmd);
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pci_read_config_word(bdf, PCI_COMMAND, &cmd);
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@ -129,8 +129,7 @@ pci_sata_init (void)
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return 0;
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return 0;
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}
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}
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int
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int sata_bus_probe(int port_no)
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sata_bus_probe (int port_no)
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{
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{
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int orig_mask, mask;
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int orig_mask, mask;
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u16 pcs;
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u16 pcs;
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@ -144,10 +143,9 @@ sata_bus_probe (int port_no)
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return 1;
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return 1;
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}
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}
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int
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int init_sata(int dev)
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init_sata (int dev)
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{
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{
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static int done = 0;
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static int done;
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u8 i, rv = 0;
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u8 i, rv = 0;
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if (!done)
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if (!done)
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@ -157,7 +155,7 @@ init_sata (int dev)
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rv = pci_sata_init();
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rv = pci_sata_init();
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if (rv == 1) {
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if (rv == 1) {
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printf ("pci initialization failed\n");
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puts("pci initialization failed\n");
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return 1;
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return 1;
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}
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}
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@ -182,13 +180,12 @@ init_sata (int dev)
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printf("SATA#%d port is not present\n", i);
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printf("SATA#%d port is not present\n", i);
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} else {
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} else {
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printf("SATA#%d port is present\n", i);
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printf("SATA#%d port is present\n", i);
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if (sata_bus_softreset (i)) {
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if (sata_bus_softreset(i))
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port[i].port_state = 0;
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port[i].port_state = 0;
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} else {
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else
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port[i].port_state = 1;
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port[i].port_state = 1;
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}
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}
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}
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}
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}
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for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
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for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
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u8 j, devno;
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u8 j, devno;
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@ -210,33 +207,29 @@ init_sata (int dev)
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return 0;
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return 0;
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}
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}
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static u8 __inline__
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static inline u8 sata_inb(unsigned long ioaddr)
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sata_inb (unsigned long ioaddr)
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{
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{
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return inb(ioaddr);
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return inb(ioaddr);
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}
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}
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static void __inline__
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static inline void sata_outb(unsigned char val, unsigned long ioaddr)
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sata_outb (unsigned char val, unsigned long ioaddr)
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{
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{
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outb(val, ioaddr);
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outb(val, ioaddr);
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}
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}
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static void
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static void output_data(struct sata_ioports *ioaddr, ulong * sect_buf,
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output_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
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int words)
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{
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{
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outsw(ioaddr->data_addr, sect_buf, words << 1);
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outsw(ioaddr->data_addr, sect_buf, words << 1);
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}
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}
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static int
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static int input_data(struct sata_ioports *ioaddr, ulong * sect_buf, int words)
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input_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
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{
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{
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insw(ioaddr->data_addr, sect_buf, words << 1);
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insw(ioaddr->data_addr, sect_buf, words << 1);
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return 0;
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return 0;
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}
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}
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static void
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static void sata_cpy(unsigned char *dst, unsigned char *src, unsigned int len)
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sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
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{
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{
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unsigned char *end, *last;
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unsigned char *end, *last;
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@ -261,8 +254,7 @@ sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
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*last = '\0';
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*last = '\0';
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}
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}
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int
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int sata_bus_softreset(int num)
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sata_bus_softreset (int num)
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{
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{
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u8 dev = 0, status = 0, i;
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u8 dev = 0, status = 0, i;
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@ -270,10 +262,10 @@ sata_bus_softreset (int num)
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for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) {
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for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) {
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if (!(sata_devchk(&port[num].ioaddr, i))) {
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if (!(sata_devchk(&port[num].ioaddr, i))) {
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PRINTF ("dev_chk failed for dev#%d\n", i);
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debug("dev_chk failed for dev#%d\n", i);
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} else {
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} else {
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port[num].dev_mask |= (1 << i);
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port[num].dev_mask |= (1 << i);
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PRINTF ("dev_chk passed for dev#%d\n", i);
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debug("dev_chk passed for dev#%d\n", i);
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}
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}
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}
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}
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@ -291,7 +283,8 @@ sata_bus_softreset (int num)
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udelay(10);
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udelay(10);
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sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
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sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
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/* spec mandates ">= 2ms" before checking status.
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/*
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* spec mandates ">= 2ms" before checking status.
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* We wait 150ms, because that was the magic delay used for
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* We wait 150ms, because that was the magic delay used for
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* ATAPI devices in Hale Landis's ATADRVR, for the period of time
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* ATAPI devices in Hale Landis's ATADRVR, for the period of time
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* between when the ATA command register is written, and then
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* between when the ATA command register is written, and then
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@ -299,10 +292,10 @@ sata_bus_softreset (int num)
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* checking status is fine, post SRST, we perform this magic
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* checking status is fine, post SRST, we perform this magic
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* delay here as well.
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* delay here as well.
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*/
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*/
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msleep (150);
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mdelay(150);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300);
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while ((status & ATA_BUSY)) {
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while ((status & ATA_BUSY)) {
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msleep (100);
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mdelay(100);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3);
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}
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}
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@ -310,22 +303,21 @@ sata_bus_softreset (int num)
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printf("ata%u is slow to respond,plz be patient\n", num);
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printf("ata%u is slow to respond,plz be patient\n", num);
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while ((status & ATA_BUSY)) {
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while ((status & ATA_BUSY)) {
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msleep (100);
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mdelay(100);
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status = sata_chk_status(&port[num].ioaddr);
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status = sata_chk_status(&port[num].ioaddr);
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}
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}
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if (status & ATA_BUSY) {
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if (status & ATA_BUSY) {
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printf ("ata%u failed to respond : ", num);
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printf("ata%u failed to respond : bus reset failed\n", num);
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printf ("bus reset failed\n");
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return 1;
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return 1;
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}
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}
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return 0;
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return 0;
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}
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}
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void
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void sata_identify(int num, int dev)
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sata_identify (int num, int dev)
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{
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{
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u8 cmd = 0, status = 0, devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev;
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u8 cmd = 0, status = 0;
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u8 devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev;
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u16 iobuf[ATA_SECT_SIZE];
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u16 iobuf[ATA_SECT_SIZE];
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u64 n_sectors = 0;
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u64 n_sectors = 0;
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u8 mask = 0;
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u8 mask = 0;
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@ -355,31 +347,29 @@ sata_identify (int num, int dev)
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 1000);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 1000);
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if (status & ATA_ERR) {
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if (status & ATA_ERR) {
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printf ("\ndevice not responding\n");
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puts("\ndevice not responding\n");
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port[num].dev_mask &= ~mask;
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port[num].dev_mask &= ~mask;
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return;
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return;
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}
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}
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input_data(&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
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input_data(&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
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PRINTF ("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
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debug("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
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"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
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"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
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iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
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iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
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iobuf[87], iobuf[88]);
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iobuf[87], iobuf[88]);
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/* we require LBA and DMA support (bits 8 & 9 of word 49) */
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/* we require LBA and DMA support (bits 8 & 9 of word 49) */
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if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) {
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if (!ata_id_has_dma(iobuf) || !ata_id_has_lba(iobuf))
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PRINTF ("ata%u: no dma/lba\n", num);
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debug("ata%u: no dma/lba\n", num);
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}
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ata_dump_id(iobuf);
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ata_dump_id(iobuf);
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if (ata_id_has_lba48 (iobuf)) {
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if (ata_id_has_lba48(iobuf))
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n_sectors = ata_id_u64(iobuf, 100);
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n_sectors = ata_id_u64(iobuf, 100);
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} else {
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else
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n_sectors = ata_id_u32(iobuf, 60);
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n_sectors = ata_id_u32(iobuf, 60);
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}
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debug("no. of sectors %u\n", ata_id_u64(iobuf, 100));
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PRINTF ("no. of sectors %u\n", ata_id_u64 (iobuf, 100));
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debug("no. of sectors %u\n", ata_id_u32(iobuf, 60));
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PRINTF ("no. of sectors %u\n", ata_id_u32 (iobuf, 60));
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if (n_sectors == 0) {
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if (n_sectors == 0) {
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port[num].dev_mask &= ~mask;
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port[num].dev_mask &= ~mask;
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@ -395,14 +385,13 @@ sata_identify (int num, int dev)
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strswab(sata_dev_desc[devno].revision);
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strswab(sata_dev_desc[devno].revision);
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strswab(sata_dev_desc[devno].vendor);
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strswab(sata_dev_desc[devno].vendor);
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if ((iop->config & 0x0080) == 0x0080) {
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if ((iop->config & 0x0080) == 0x0080)
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sata_dev_desc[devno].removable = 1;
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sata_dev_desc[devno].removable = 1;
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} else {
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else
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sata_dev_desc[devno].removable = 0;
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sata_dev_desc[devno].removable = 0;
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}
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sata_dev_desc[devno].lba = iop->lba_capacity;
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sata_dev_desc[devno].lba = iop->lba_capacity;
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PRINTF ("lba=0x%x", sata_dev_desc[devno].lba);
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debug("lba=0x%x", sata_dev_desc[devno].lba);
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#ifdef CONFIG_LBA48
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#ifdef CONFIG_LBA48
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if (iop->command_set_2 & 0x0400) {
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if (iop->command_set_2 & 0x0400) {
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@ -422,8 +411,7 @@ sata_identify (int num, int dev)
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sata_dev_desc[devno].lun = 0; /* just to fill something in... */
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sata_dev_desc[devno].lun = 0; /* just to fill something in... */
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}
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}
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void
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void set_Feature_cmd(int num, int dev)
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set_Feature_cmd (int num, int dev)
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{
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{
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u8 mask = 0x00, status = 0;
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u8 mask = 0x00, status = 0;
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@ -433,7 +421,7 @@ set_Feature_cmd (int num, int dev)
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mask = 0x02;
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mask = 0x02;
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if (!(port[num].dev_mask & mask)) {
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if (!(port[num].dev_mask & mask)) {
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PRINTF ("dev%d is not present on port#%d\n", dev, num);
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debug("dev%d is not present on port#%d\n", dev, num);
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return;
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return;
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}
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}
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@ -449,7 +437,7 @@ set_Feature_cmd (int num, int dev)
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sata_outb(ATA_CMD_SETF, port[num].ioaddr.command_addr);
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sata_outb(ATA_CMD_SETF, port[num].ioaddr.command_addr);
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udelay(50);
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udelay(50);
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msleep (150);
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mdelay(150);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 5000);
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status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 5000);
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if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
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if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
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@ -458,8 +446,7 @@ set_Feature_cmd (int num, int dev)
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}
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}
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}
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}
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void
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void sata_port(struct sata_ioports *ioport)
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sata_port (struct sata_ioports *ioport)
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{
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{
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ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
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ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
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ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
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ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
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@ -473,8 +460,7 @@ sata_port (struct sata_ioports *ioport)
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ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
|
ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int sata_devchk(struct sata_ioports *ioaddr, int dev)
|
||||||
sata_devchk (struct sata_ioports *ioaddr, int dev)
|
|
||||||
{
|
{
|
||||||
u8 nsect, lbal;
|
u8 nsect, lbal;
|
||||||
|
|
||||||
@ -498,8 +484,7 @@ sata_devchk (struct sata_ioports *ioaddr, int dev)
|
|||||||
return 0; /* nothing found */
|
return 0; /* nothing found */
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void dev_select(struct sata_ioports *ioaddr, int dev)
|
||||||
dev_select (struct sata_ioports *ioaddr, int dev)
|
|
||||||
{
|
{
|
||||||
u8 tmp = 0;
|
u8 tmp = 0;
|
||||||
|
|
||||||
@ -513,8 +498,7 @@ dev_select (struct sata_ioports *ioaddr, int dev)
|
|||||||
udelay(5);
|
udelay(5);
|
||||||
}
|
}
|
||||||
|
|
||||||
u8
|
u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max)
|
||||||
sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
|
|
||||||
{
|
{
|
||||||
u8 status;
|
u8 status;
|
||||||
|
|
||||||
@ -527,23 +511,13 @@ sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
|
|||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
u8
|
u8 sata_chk_status(struct sata_ioports *ioaddr)
|
||||||
sata_chk_status (struct sata_ioports * ioaddr)
|
|
||||||
{
|
{
|
||||||
return sata_inb(ioaddr->status_addr);
|
return sata_inb(ioaddr->status_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
|
||||||
msleep (int count)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++)
|
ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buff)
|
||||||
udelay (1000);
|
|
||||||
}
|
|
||||||
|
|
||||||
ulong
|
|
||||||
sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|
||||||
{
|
{
|
||||||
ulong n = 0, *buffer = (ulong *)buff;
|
ulong n = 0, *buffer = (ulong *)buff;
|
||||||
u8 dev = 0, num = 0, mask = 0, status = 0;
|
u8 dev = 0, num = 0, mask = 0, status = 0;
|
||||||
@ -624,7 +598,7 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|||||||
port[num].ioaddr.command_addr);
|
port[num].ioaddr.command_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
msleep (50);
|
mdelay(50);
|
||||||
/* may take up to 4 sec */
|
/* may take up to 4 sec */
|
||||||
status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
|
status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
|
||||||
|
|
||||||
@ -636,7 +610,7 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|||||||
device, (ulong) blknr, status);
|
device, (ulong) blknr, status);
|
||||||
err = sata_inb(port[num].ioaddr.error_addr);
|
err = sata_inb(port[num].ioaddr.error_addr);
|
||||||
printf("Error reg = 0x%x\n", err);
|
printf("Error reg = 0x%x\n", err);
|
||||||
return (n);
|
return n;
|
||||||
}
|
}
|
||||||
input_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
input_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
||||||
sata_inb(port[num].ioaddr.altstatus_addr);
|
sata_inb(port[num].ioaddr.altstatus_addr);
|
||||||
@ -649,8 +623,7 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|||||||
return n;
|
return n;
|
||||||
}
|
}
|
||||||
|
|
||||||
ulong
|
ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, void *buff)
|
||||||
sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|
||||||
{
|
{
|
||||||
ulong n = 0, *buffer = (ulong *)buff;
|
ulong n = 0, *buffer = (ulong *)buff;
|
||||||
unsigned char status = 0, num = 0, dev = 0, mask = 0;
|
unsigned char status = 0, num = 0, dev = 0, mask = 0;
|
||||||
@ -726,14 +699,14 @@ sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
|
|||||||
port[num].ioaddr.command_addr);
|
port[num].ioaddr.command_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
msleep (50);
|
mdelay(50);
|
||||||
/* may take up to 4 sec */
|
/* may take up to 4 sec */
|
||||||
status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
|
status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
|
||||||
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
|
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
|
||||||
!= ATA_STAT_DRQ) {
|
!= ATA_STAT_DRQ) {
|
||||||
printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
|
printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
|
||||||
device, (ulong) blknr, status);
|
device, (ulong) blknr, status);
|
||||||
return (n);
|
return n;
|
||||||
}
|
}
|
||||||
|
|
||||||
output_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
output_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
||||||
|
@ -1,12 +1,6 @@
|
|||||||
#ifndef __ATA_PIIX_H__
|
#ifndef __ATA_PIIX_H__
|
||||||
#define __ATA_PIIX_H__
|
#define __ATA_PIIX_H__
|
||||||
|
|
||||||
#if (DEBUG_SATA)
|
|
||||||
#define PRINTF(fmt,args...) printf (fmt ,##args)
|
|
||||||
#else
|
|
||||||
#define PRINTF(fmt,args...)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
struct sata_ioports {
|
struct sata_ioports {
|
||||||
unsigned long cmd_addr;
|
unsigned long cmd_addr;
|
||||||
unsigned long data_addr;
|
unsigned long data_addr;
|
||||||
@ -37,20 +31,19 @@ struct sata_port {
|
|||||||
|
|
||||||
/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
||||||
#ifdef SATA_DECL /* SATA library specific declarations */
|
#ifdef SATA_DECL /* SATA library specific declarations */
|
||||||
inline void
|
inline void ata_dump_id(u16 *id)
|
||||||
ata_dump_id (u16 * id)
|
|
||||||
{
|
{
|
||||||
PRINTF ("49 = 0x%04x "
|
debug("49 = 0x%04x "
|
||||||
"53 = 0x%04x "
|
"53 = 0x%04x "
|
||||||
"63 = 0x%04x "
|
"63 = 0x%04x "
|
||||||
"64 = 0x%04x "
|
"64 = 0x%04x "
|
||||||
"75 = 0x%04x\n", id[49], id[53], id[63], id[64], id[75]);
|
"75 = 0x%04x\n", id[49], id[53], id[63], id[64], id[75]);
|
||||||
PRINTF ("80 = 0x%04x "
|
debug("80 = 0x%04x "
|
||||||
"81 = 0x%04x "
|
"81 = 0x%04x "
|
||||||
"82 = 0x%04x "
|
"82 = 0x%04x "
|
||||||
"83 = 0x%04x "
|
"83 = 0x%04x "
|
||||||
"84 = 0x%04x\n", id[80], id[81], id[82], id[83], id[84]);
|
"84 = 0x%04x\n", id[80], id[81], id[82], id[83], id[84]);
|
||||||
PRINTF ("88 = 0x%04x " "93 = 0x%04x\n", id[88], id[93]);
|
debug("88 = 0x%04x " "93 = 0x%04x\n", id[88], id[93]);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -65,7 +58,6 @@ u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max);
|
|||||||
u8 sata_chk_status(struct sata_ioports *ioaddr);
|
u8 sata_chk_status(struct sata_ioports *ioaddr);
|
||||||
ulong sata_read(int device, ulong blknr,lbaint_t blkcnt, void *buffer);
|
ulong sata_read(int device, ulong blknr,lbaint_t blkcnt, void *buffer);
|
||||||
ulong sata_write(int device,ulong blknr, lbaint_t blkcnt, void *buffer);
|
ulong sata_write(int device,ulong blknr, lbaint_t blkcnt, void *buffer);
|
||||||
void msleep (int count);
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
||||||
|
Loading…
x
Reference in New Issue
Block a user