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ata_piix: Fix checkpatch issues

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While in here also:
- Switch to debug from custom PRINTF for debugging.
- Use mdelay rather than custom msleep.

Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
Tom Rini 2012-09-29 07:35:12 -07:00
parent e5f24753c9
commit 879a57ac0e
2 changed files with 232 additions and 267 deletions
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451
drivers/block/ata_piix.c
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@ -38,13 +38,13 @@
extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
extern int sata_curr_device; extern int sata_curr_device;
#define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */ #define DEBUG_SATA 0 /* For debug prints set DEBUG_SATA to 1 */
#define SATA_DECL #define SATA_DECL
#define DRV_DECL /*For file specific declarations */ #define DRV_DECL /* For file specific declarations */
#include "ata_piix.h" #include "ata_piix.h"
/*Macros realted to PCI*/ /* Macros realted to PCI */
#define PCI_SATA_BUS 0x00 #define PCI_SATA_BUS 0x00
#define PCI_SATA_DEV 0x1f #define PCI_SATA_DEV 0x1f
#define PCI_SATA_FUNC 0x02 #define PCI_SATA_FUNC 0x02
@ -63,35 +63,36 @@ extern int sata_curr_device;
#define PORT_ENABLED (1<<4) #define PORT_ENABLED (1<<4)
u32 bdf; u32 bdf;
u32 iobase1 = 0; /*Primary cmd block */ u32 iobase1; /* Primary cmd block */
u32 iobase2 = 0; /*Primary ctl block */ u32 iobase2; /* Primary ctl block */
u32 iobase3 = 0; /*Sec cmd block */ u32 iobase3; /* Sec cmd block */
u32 iobase4 = 0; /*sec ctl block */ u32 iobase4; /* sec ctl block */
u32 iobase5 = 0; /*BMDMA*/ u32 iobase5; /* BMDMA*/
int
pci_sata_init (void) int pci_sata_init(void)
{ {
u32 bus = PCI_SATA_BUS; u32 bus = PCI_SATA_BUS;
u32 dev = PCI_SATA_DEV; u32 dev = PCI_SATA_DEV;
u32 fun = PCI_SATA_FUNC; u32 fun = PCI_SATA_FUNC;
u16 cmd = 0; u16 cmd = 0;
u8 lat = 0, pcibios_max_latency = 0xff; u8 lat = 0, pcibios_max_latency = 0xff;
u8 pmr; /*Port mapping reg */ u8 pmr; /* Port mapping reg */
u8 pi; /*Prgming Interface reg */ u8 pi; /* Prgming Interface reg */
bdf = PCI_BDF (bus, dev, fun); bdf = PCI_BDF(bus, dev, fun);
pci_read_config_dword (bdf, PCI_SATA_BASE1, &iobase1); pci_read_config_dword(bdf, PCI_SATA_BASE1, &iobase1);
pci_read_config_dword (bdf, PCI_SATA_BASE2, &iobase2); pci_read_config_dword(bdf, PCI_SATA_BASE2, &iobase2);
pci_read_config_dword (bdf, PCI_SATA_BASE3, &iobase3); pci_read_config_dword(bdf, PCI_SATA_BASE3, &iobase3);
pci_read_config_dword (bdf, PCI_SATA_BASE4, &iobase4); pci_read_config_dword(bdf, PCI_SATA_BASE4, &iobase4);
pci_read_config_dword (bdf, PCI_SATA_BASE5, &iobase5); pci_read_config_dword(bdf, PCI_SATA_BASE5, &iobase5);
if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) || if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
(iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) || (iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
(iobase5 == 0xFFFFFFFF)) { (iobase5 == 0xFFFFFFFF)) {
printf ("error no base addr for SATA controller\n"); /* ERROR */
printf("error no base addr for SATA controller\n");
return 1; return 1;
/*ERROR*/} }
iobase1 &= 0xFFFFFFFE; iobase1 &= 0xFFFFFFFE;
iobase2 &= 0xFFFFFFFE; iobase2 &= 0xFFFFFFFE;
@ -99,44 +100,42 @@ pci_sata_init (void)
iobase4 &= 0xFFFFFFFE; iobase4 &= 0xFFFFFFFE;
iobase5 &= 0xFFFFFFFE; iobase5 &= 0xFFFFFFFE;
/*check for mode */ /* check for mode */
pci_read_config_byte (bdf, PCI_PMR, &pmr); pci_read_config_byte(bdf, PCI_PMR, &pmr);
if (pmr > 1) { if (pmr > 1) {
printf ("combined mode not supported\n"); puts("combined mode not supported\n");
return 1; return 1;
} }
pci_read_config_byte (bdf, PCI_PI, &pi); pci_read_config_byte(bdf, PCI_PI, &pi);
if ((pi & 0x05) != 0x05) { if ((pi & 0x05) != 0x05) {
printf ("Sata is in Legacy mode\n"); puts("Sata is in Legacy mode\n");
return 1; return 1;
} else { } else
printf ("sata is in Native mode\n"); puts("sata is in Native mode\n");
}
/*MASTER CFG AND IO CFG */ /* MASTER CFG AND IO CFG */
pci_read_config_word (bdf, PCI_COMMAND, &cmd); pci_read_config_word(bdf, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO; cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
pci_write_config_word (bdf, PCI_COMMAND, cmd); pci_write_config_word(bdf, PCI_COMMAND, cmd);
pci_read_config_byte (dev, PCI_LATENCY_TIMER, &lat); pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
if (lat < 16) if (lat < 16)
lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
else if (lat > pcibios_max_latency) else if (lat > pcibios_max_latency)
lat = pcibios_max_latency; lat = pcibios_max_latency;
pci_write_config_byte (dev, PCI_LATENCY_TIMER, lat); pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
return 0; return 0;
} }
int int sata_bus_probe(int port_no)
sata_bus_probe (int port_no)
{ {
int orig_mask, mask; int orig_mask, mask;
u16 pcs; u16 pcs;
mask = (PORT_PRESENT << port_no); mask = (PORT_PRESENT << port_no);
pci_read_config_word (bdf, PCI_PCS, &pcs); pci_read_config_word(bdf, PCI_PCS, &pcs);
orig_mask = (int) pcs & 0xff; orig_mask = (int) pcs & 0xff;
if ((orig_mask & mask) != mask) if ((orig_mask & mask) != mask)
return 0; return 0;
@ -144,10 +143,9 @@ sata_bus_probe (int port_no)
return 1; return 1;
} }
int int init_sata(int dev)
init_sata (int dev)
{ {
static int done = 0; static int done;
u8 i, rv = 0; u8 i, rv = 0;
if (!done) if (!done)
@ -155,9 +153,9 @@ init_sata (int dev)
else else
return 0; return 0;
rv = pci_sata_init (); rv = pci_sata_init();
if (rv == 1) { if (rv == 1) {
printf ("pci initialization failed\n"); puts("pci initialization failed\n");
return 1; return 1;
} }
@ -174,21 +172,20 @@ init_sata (int dev)
port[1].ioaddr.bmdma_addr = iobase5 + 0x8; port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++)
sata_port (&port[i].ioaddr); sata_port(&port[i].ioaddr);
for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) { for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
if (!(sata_bus_probe (i))) { if (!(sata_bus_probe(i))) {
port[i].port_state = 0; port[i].port_state = 0;
printf ("SATA#%d port is not present \n", i); printf("SATA#%d port is not present\n", i);
} else { } else {
printf ("SATA#%d port is present\n", i); printf("SATA#%d port is present\n", i);
if (sata_bus_softreset (i)) { if (sata_bus_softreset(i))
port[i].port_state = 0; port[i].port_state = 0;
} else { else
port[i].port_state = 1; port[i].port_state = 1;
} }
} }
}
for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) { for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
u8 j, devno; u8 j, devno;
@ -196,47 +193,43 @@ init_sata (int dev)
if (port[i].port_state == 0) if (port[i].port_state == 0)
continue; continue;
for (j = 0; j < CONFIG_SYS_SATA_DEVS_PER_BUS; j++) { for (j = 0; j < CONFIG_SYS_SATA_DEVS_PER_BUS; j++) {
sata_identify (i, j); sata_identify(i, j);
set_Feature_cmd (i, j); set_Feature_cmd(i, j);
devno = i * CONFIG_SYS_SATA_DEVS_PER_BUS + j; devno = i * CONFIG_SYS_SATA_DEVS_PER_BUS + j;
if ((sata_dev_desc[devno].lba > 0) && if ((sata_dev_desc[devno].lba > 0) &&
(sata_dev_desc[devno].blksz > 0)) { (sata_dev_desc[devno].blksz > 0)) {
dev_print (&sata_dev_desc[devno]); dev_print(&sata_dev_desc[devno]);
/* initialize partition type */ /* initialize partition type */
init_part (&sata_dev_desc[devno]); init_part(&sata_dev_desc[devno]);
} }
} }
} }
return 0; return 0;
} }
static u8 __inline__ static inline u8 sata_inb(unsigned long ioaddr)
sata_inb (unsigned long ioaddr)
{ {
return inb (ioaddr); return inb(ioaddr);
} }
static void __inline__ static inline void sata_outb(unsigned char val, unsigned long ioaddr)
sata_outb (unsigned char val, unsigned long ioaddr)
{ {
outb (val, ioaddr); outb(val, ioaddr);
} }
static void static void output_data(struct sata_ioports *ioaddr, ulong * sect_buf,
output_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words) int words)
{ {
outsw (ioaddr->data_addr, sect_buf, words << 1); outsw(ioaddr->data_addr, sect_buf, words << 1);
} }
static int static int input_data(struct sata_ioports *ioaddr, ulong * sect_buf, int words)
input_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
{ {
insw (ioaddr->data_addr, sect_buf, words << 1); insw(ioaddr->data_addr, sect_buf, words << 1);
return 0; return 0;
} }
static void static void sata_cpy(unsigned char *dst, unsigned char *src, unsigned int len)
sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
{ {
unsigned char *end, *last; unsigned char *end, *last;
@ -257,41 +250,41 @@ sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
if (*src++ != ' ') if (*src++ != ' ')
last = dst; last = dst;
} }
OUT: OUT:
*last = '\0'; *last = '\0';
} }
int int sata_bus_softreset(int num)
sata_bus_softreset (int num)
{ {
u8 dev = 0, status = 0, i; u8 dev = 0, status = 0, i;
port[num].dev_mask = 0; port[num].dev_mask = 0;
for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) { for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) {
if (!(sata_devchk (&port[num].ioaddr, i))) { if (!(sata_devchk(&port[num].ioaddr, i))) {
PRINTF ("dev_chk failed for dev#%d\n", i); debug("dev_chk failed for dev#%d\n", i);
} else { } else {
port[num].dev_mask |= (1 << i); port[num].dev_mask |= (1 << i);
PRINTF ("dev_chk passed for dev#%d\n", i); debug("dev_chk passed for dev#%d\n", i);
} }
} }
if (!(port[num].dev_mask)) { if (!(port[num].dev_mask)) {
printf ("no devices on port%d\n", num); printf("no devices on port%d\n", num);
return 1; return 1;
} }
dev_select (&port[num].ioaddr, dev); dev_select(&port[num].ioaddr, dev);
port[num].ctl_reg = 0x08; /*Default value of control reg */ port[num].ctl_reg = 0x08; /* Default value of control reg */
sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
udelay (10); udelay(10);
sata_outb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr); sata_outb(port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
udelay (10); udelay(10);
sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
/* spec mandates ">= 2ms" before checking status. /*
* spec mandates ">= 2ms" before checking status.
* We wait 150ms, because that was the magic delay used for * We wait 150ms, because that was the magic delay used for
* ATAPI devices in Hale Landis's ATADRVR, for the period of time * ATAPI devices in Hale Landis's ATADRVR, for the period of time
* between when the ATA command register is written, and then * between when the ATA command register is written, and then
@ -299,38 +292,37 @@ sata_bus_softreset (int num)
* checking status is fine, post SRST, we perform this magic * checking status is fine, post SRST, we perform this magic
* delay here as well. * delay here as well.
*/ */
msleep (150); mdelay(150);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300);
while ((status & ATA_BUSY)) { while ((status & ATA_BUSY)) {
msleep (100); mdelay(100);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3);
} }
if (status & ATA_BUSY) if (status & ATA_BUSY)
printf ("ata%u is slow to respond,plz be patient\n", num); printf("ata%u is slow to respond,plz be patient\n", num);
while ((status & ATA_BUSY)) { while ((status & ATA_BUSY)) {
msleep (100); mdelay(100);
status = sata_chk_status (&port[num].ioaddr); status = sata_chk_status(&port[num].ioaddr);
} }
if (status & ATA_BUSY) { if (status & ATA_BUSY) {
printf ("ata%u failed to respond : ", num); printf("ata%u failed to respond : bus reset failed\n", num);
printf ("bus reset failed\n");
return 1; return 1;
} }
return 0; return 0;
} }
void void sata_identify(int num, int dev)
sata_identify (int num, int dev)
{ {
u8 cmd = 0, status = 0, devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev; u8 cmd = 0, status = 0;
u8 devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev;
u16 iobuf[ATA_SECT_SIZE]; u16 iobuf[ATA_SECT_SIZE];
u64 n_sectors = 0; u64 n_sectors = 0;
u8 mask = 0; u8 mask = 0;
memset (iobuf, 0, sizeof (iobuf)); memset(iobuf, 0, sizeof(iobuf));
hd_driveid_t *iop = (hd_driveid_t *) iobuf; hd_driveid_t *iop = (hd_driveid_t *) iobuf;
if (dev == 0) if (dev == 0)
@ -339,70 +331,67 @@ sata_identify (int num, int dev)
mask = 0x02; mask = 0x02;
if (!(port[num].dev_mask & mask)) { if (!(port[num].dev_mask & mask)) {
printf ("dev%d is not present on port#%d\n", dev, num); printf("dev%d is not present on port#%d\n", dev, num);
return; return;
} }
printf ("port=%d dev=%d\n", num, dev); printf("port=%d dev=%d\n", num, dev);
dev_select (&port[num].ioaddr, dev); dev_select(&port[num].ioaddr, dev);
status = 0; status = 0;
cmd = ATA_CMD_IDENT; /*Device Identify Command */ cmd = ATA_CMD_IDENT; /* Device Identify Command */
sata_outb (cmd, port[num].ioaddr.command_addr); sata_outb(cmd, port[num].ioaddr.command_addr);
sata_inb (port[num].ioaddr.altstatus_addr); sata_inb(port[num].ioaddr.altstatus_addr);
udelay (10); udelay(10);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 1000);
if (status & ATA_ERR) { if (status & ATA_ERR) {
printf ("\ndevice not responding\n"); puts("\ndevice not responding\n");
port[num].dev_mask &= ~mask; port[num].dev_mask &= ~mask;
return; return;
} }
input_data (&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS); input_data(&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
PRINTF ("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x" debug("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49], "86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86], iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
iobuf[87], iobuf[88]); iobuf[87], iobuf[88]);
/* we require LBA and DMA support (bits 8 & 9 of word 49) */ /* we require LBA and DMA support (bits 8 & 9 of word 49) */
if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) { if (!ata_id_has_dma(iobuf) || !ata_id_has_lba(iobuf))
PRINTF ("ata%u: no dma/lba\n", num); debug("ata%u: no dma/lba\n", num);
} ata_dump_id(iobuf);
ata_dump_id (iobuf);
if (ata_id_has_lba48 (iobuf)) { if (ata_id_has_lba48(iobuf))
n_sectors = ata_id_u64 (iobuf, 100); n_sectors = ata_id_u64(iobuf, 100);
} else { else
n_sectors = ata_id_u32 (iobuf, 60); n_sectors = ata_id_u32(iobuf, 60);
} debug("no. of sectors %u\n", ata_id_u64(iobuf, 100));
PRINTF ("no. of sectors %u\n", ata_id_u64 (iobuf, 100)); debug("no. of sectors %u\n", ata_id_u32(iobuf, 60));
PRINTF ("no. of sectors %u\n", ata_id_u32 (iobuf, 60));
if (n_sectors == 0) { if (n_sectors == 0) {
port[num].dev_mask &= ~mask; port[num].dev_mask &= ~mask;
return; return;
} }
sata_cpy ((unsigned char *)sata_dev_desc[devno].revision, iop->fw_rev, sata_cpy((unsigned char *)sata_dev_desc[devno].revision, iop->fw_rev,
sizeof (sata_dev_desc[devno].revision)); sizeof(sata_dev_desc[devno].revision));
sata_cpy ((unsigned char *)sata_dev_desc[devno].vendor, iop->model, sata_cpy((unsigned char *)sata_dev_desc[devno].vendor, iop->model,
sizeof (sata_dev_desc[devno].vendor)); sizeof(sata_dev_desc[devno].vendor));
sata_cpy ((unsigned char *)sata_dev_desc[devno].product, iop->serial_no, sata_cpy((unsigned char *)sata_dev_desc[devno].product, iop->serial_no,
sizeof (sata_dev_desc[devno].product)); sizeof(sata_dev_desc[devno].product));
strswab (sata_dev_desc[devno].revision); strswab(sata_dev_desc[devno].revision);
strswab (sata_dev_desc[devno].vendor); strswab(sata_dev_desc[devno].vendor);
if ((iop->config & 0x0080) == 0x0080) { if ((iop->config & 0x0080) == 0x0080)
sata_dev_desc[devno].removable = 1; sata_dev_desc[devno].removable = 1;
} else { else
sata_dev_desc[devno].removable = 0; sata_dev_desc[devno].removable = 0;
}
sata_dev_desc[devno].lba = iop->lba_capacity; sata_dev_desc[devno].lba = iop->lba_capacity;
PRINTF ("lba=0x%x", sata_dev_desc[devno].lba); debug("lba=0x%x", sata_dev_desc[devno].lba);
#ifdef CONFIG_LBA48 #ifdef CONFIG_LBA48
if (iop->command_set_2 & 0x0400) { if (iop->command_set_2 & 0x0400) {
@ -422,8 +411,7 @@ sata_identify (int num, int dev)
sata_dev_desc[devno].lun = 0; /* just to fill something in... */ sata_dev_desc[devno].lun = 0; /* just to fill something in... */
} }
void void set_Feature_cmd(int num, int dev)
set_Feature_cmd (int num, int dev)
{ {
u8 mask = 0x00, status = 0; u8 mask = 0x00, status = 0;
@ -433,33 +421,32 @@ set_Feature_cmd (int num, int dev)
mask = 0x02; mask = 0x02;
if (!(port[num].dev_mask & mask)) { if (!(port[num].dev_mask & mask)) {
PRINTF ("dev%d is not present on port#%d\n", dev, num); debug("dev%d is not present on port#%d\n", dev, num);
return; return;
} }
dev_select (&port[num].ioaddr, dev); dev_select(&port[num].ioaddr, dev);
sata_outb (SETFEATURES_XFER, port[num].ioaddr.feature_addr); sata_outb(SETFEATURES_XFER, port[num].ioaddr.feature_addr);
sata_outb (XFER_PIO_4, port[num].ioaddr.nsect_addr); sata_outb(XFER_PIO_4, port[num].ioaddr.nsect_addr);
sata_outb (0, port[num].ioaddr.lbal_addr); sata_outb(0, port[num].ioaddr.lbal_addr);
sata_outb (0, port[num].ioaddr.lbam_addr); sata_outb(0, port[num].ioaddr.lbam_addr);
sata_outb (0, port[num].ioaddr.lbah_addr); sata_outb(0, port[num].ioaddr.lbah_addr);
sata_outb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr); sata_outb(ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
sata_outb (ATA_CMD_SETF, port[num].ioaddr.command_addr); sata_outb(ATA_CMD_SETF, port[num].ioaddr.command_addr);
udelay (50); udelay(50);
msleep (150); mdelay(150);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 5000);
if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) { if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
printf ("Error : status 0x%02x\n", status); printf("Error : status 0x%02x\n", status);
port[num].dev_mask &= ~mask; port[num].dev_mask &= ~mask;
} }
} }
void void sata_port(struct sata_ioports *ioport)
sata_port (struct sata_ioports *ioport)
{ {
ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA; ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR; ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
@ -473,24 +460,23 @@ sata_port (struct sata_ioports *ioport)
ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD; ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
} }
int int sata_devchk(struct sata_ioports *ioaddr, int dev)
sata_devchk (struct sata_ioports *ioaddr, int dev)
{ {
u8 nsect, lbal; u8 nsect, lbal;
dev_select (ioaddr, dev); dev_select(ioaddr, dev);
sata_outb (0x55, ioaddr->nsect_addr); sata_outb(0x55, ioaddr->nsect_addr);
sata_outb (0xaa, ioaddr->lbal_addr); sata_outb(0xaa, ioaddr->lbal_addr);
sata_outb (0xaa, ioaddr->nsect_addr); sata_outb(0xaa, ioaddr->nsect_addr);
sata_outb (0x55, ioaddr->lbal_addr); sata_outb(0x55, ioaddr->lbal_addr);
sata_outb (0x55, ioaddr->nsect_addr); sata_outb(0x55, ioaddr->nsect_addr);
sata_outb (0xaa, ioaddr->lbal_addr); sata_outb(0xaa, ioaddr->lbal_addr);
nsect = sata_inb (ioaddr->nsect_addr); nsect = sata_inb(ioaddr->nsect_addr);
lbal = sata_inb (ioaddr->lbal_addr); lbal = sata_inb(ioaddr->lbal_addr);
if ((nsect == 0x55) && (lbal == 0xaa)) if ((nsect == 0x55) && (lbal == 0xaa))
return 1; /* we found a device */ return 1; /* we found a device */
@ -498,8 +484,7 @@ sata_devchk (struct sata_ioports *ioaddr, int dev)
return 0; /* nothing found */ return 0; /* nothing found */
} }
void void dev_select(struct sata_ioports *ioaddr, int dev)
dev_select (struct sata_ioports *ioaddr, int dev)
{ {
u8 tmp = 0; u8 tmp = 0;
@ -508,42 +493,31 @@ dev_select (struct sata_ioports *ioaddr, int dev)
else else
tmp = ATA_DEVICE_OBS | ATA_DEV1; tmp = ATA_DEVICE_OBS | ATA_DEV1;
sata_outb (tmp, ioaddr->device_addr); sata_outb(tmp, ioaddr->device_addr);
sata_inb (ioaddr->altstatus_addr); sata_inb(ioaddr->altstatus_addr);
udelay (5); udelay(5);
} }
u8 u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max)
sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
{ {
u8 status; u8 status;
do { do {
udelay (1000); udelay(1000);
status = sata_chk_status (ioaddr); status = sata_chk_status(ioaddr);
max--; max--;
} while ((status & bits) && (max > 0)); } while ((status & bits) && (max > 0));
return status; return status;
} }
u8 u8 sata_chk_status(struct sata_ioports *ioaddr)
sata_chk_status (struct sata_ioports * ioaddr)
{ {
return sata_inb (ioaddr->status_addr); return sata_inb(ioaddr->status_addr);
} }
void
msleep (int count)
{
int i;
for (i = 0; i < count; i++) ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buff)
udelay (1000);
}
ulong
sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
{ {
ulong n = 0, *buffer = (ulong *)buff; ulong n = 0, *buffer = (ulong *)buff;
u8 dev = 0, num = 0, mask = 0, status = 0; u8 dev = 0, num = 0, mask = 0, status = 0;
@ -553,16 +527,16 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
if (blknr & 0x0000fffff0000000) { if (blknr & 0x0000fffff0000000) {
if (!sata_dev_desc[devno].lba48) { if (!sata_dev_desc[devno].lba48) {
printf ("Drive doesn't support 48-bit addressing\n"); printf("Drive doesn't support 48-bit addressing\n");
return 0; return 0;
} }
/* more than 28 bits used, use 48bit mode */ /* more than 28 bits used, use 48bit mode */
lba48 = 1; lba48 = 1;
} }
#endif #endif
/*Port Number */ /* Port Number */
num = device / CONFIG_SYS_SATA_DEVS_PER_BUS; num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
/*dev on the port */ /* dev on the port */
if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS) if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS; dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
else else
@ -574,73 +548,73 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
mask = 0x02; mask = 0x02;
if (!(port[num].dev_mask & mask)) { if (!(port[num].dev_mask & mask)) {
printf ("dev%d is not present on port#%d\n", dev, num); printf("dev%d is not present on port#%d\n", dev, num);
return 0; return 0;
} }
/* Select device */ /* Select device */
dev_select (&port[num].ioaddr, dev); dev_select(&port[num].ioaddr, dev);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
if (status & ATA_BUSY) { if (status & ATA_BUSY) {
printf ("ata%u failed to respond\n", port[num].port_no); printf("ata%u failed to respond\n", port[num].port_no);
return n; return n;
} }
while (blkcnt-- > 0) { while (blkcnt-- > 0) {
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
if (status & ATA_BUSY) { if (status & ATA_BUSY) {
printf ("ata%u failed to respond\n", 0); printf("ata%u failed to respond\n", 0);
return n; return n;
} }
#ifdef CONFIG_LBA48 #ifdef CONFIG_LBA48
if (lba48) { if (lba48) {
/* write high bits */ /* write high bits */
sata_outb (0, port[num].ioaddr.nsect_addr); sata_outb(0, port[num].ioaddr.nsect_addr);
sata_outb ((blknr >> 24) & 0xFF, sata_outb((blknr >> 24) & 0xFF,
port[num].ioaddr.lbal_addr); port[num].ioaddr.lbal_addr);
sata_outb ((blknr >> 32) & 0xFF, sata_outb((blknr >> 32) & 0xFF,
port[num].ioaddr.lbam_addr); port[num].ioaddr.lbam_addr);
sata_outb ((blknr >> 40) & 0xFF, sata_outb((blknr >> 40) & 0xFF,
port[num].ioaddr.lbah_addr); port[num].ioaddr.lbah_addr);
} }
#endif #endif
sata_outb (1, port[num].ioaddr.nsect_addr); sata_outb(1, port[num].ioaddr.nsect_addr);
sata_outb (((blknr) >> 0) & 0xFF, sata_outb(((blknr) >> 0) & 0xFF,
port[num].ioaddr.lbal_addr); port[num].ioaddr.lbal_addr);
sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr); sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr); sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
#ifdef CONFIG_LBA48 #ifdef CONFIG_LBA48
if (lba48) { if (lba48) {
sata_outb (ATA_LBA, port[num].ioaddr.device_addr); sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
sata_outb (ATA_CMD_READ_EXT, sata_outb(ATA_CMD_READ_EXT,
port[num].ioaddr.command_addr); port[num].ioaddr.command_addr);
} else } else
#endif #endif
{ {
sata_outb (ATA_LBA | ((blknr >> 24) & 0xF), sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
port[num].ioaddr.device_addr); port[num].ioaddr.device_addr);
sata_outb (ATA_CMD_READ, sata_outb(ATA_CMD_READ,
port[num].ioaddr.command_addr); port[num].ioaddr.command_addr);
} }
msleep (50); mdelay(50);
/*may take up to 4 sec */ /* may take up to 4 sec */
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
!= ATA_STAT_DRQ) { != ATA_STAT_DRQ) {
u8 err = 0; u8 err = 0;
printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n", printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
device, (ulong) blknr, status); device, (ulong) blknr, status);
err = sata_inb (port[num].ioaddr.error_addr); err = sata_inb(port[num].ioaddr.error_addr);
printf ("Error reg = 0x%x\n", err); printf("Error reg = 0x%x\n", err);
return (n); return n;
} }
input_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS); input_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
sata_inb (port[num].ioaddr.altstatus_addr); sata_inb(port[num].ioaddr.altstatus_addr);
udelay (50); udelay(50);
++n; ++n;
++blknr; ++blknr;
@ -649,8 +623,7 @@ sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
return n; return n;
} }
ulong ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, void *buff)
sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
{ {
ulong n = 0, *buffer = (ulong *)buff; ulong n = 0, *buffer = (ulong *)buff;
unsigned char status = 0, num = 0, dev = 0, mask = 0; unsigned char status = 0, num = 0, dev = 0, mask = 0;
@ -660,16 +633,16 @@ sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
if (blknr & 0x0000fffff0000000) { if (blknr & 0x0000fffff0000000) {
if (!sata_dev_desc[devno].lba48) { if (!sata_dev_desc[devno].lba48) {
printf ("Drive doesn't support 48-bit addressing\n"); printf("Drive doesn't support 48-bit addressing\n");
return 0; return 0;
} }
/* more than 28 bits used, use 48bit mode */ /* more than 28 bits used, use 48bit mode */
lba48 = 1; lba48 = 1;
} }
#endif #endif
/*Port Number */ /* Port Number */
num = device / CONFIG_SYS_SATA_DEVS_PER_BUS; num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
/*dev on the Port */ /* dev on the Port */
if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS) if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS; dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
else else
@ -681,64 +654,64 @@ sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
mask = 0x02; mask = 0x02;
/* Select device */ /* Select device */
dev_select (&port[num].ioaddr, dev); dev_select(&port[num].ioaddr, dev);
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
if (status & ATA_BUSY) { if (status & ATA_BUSY) {
printf ("ata%u failed to respond\n", port[num].port_no); printf("ata%u failed to respond\n", port[num].port_no);
return n; return n;
} }
while (blkcnt-- > 0) { while (blkcnt-- > 0) {
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
if (status & ATA_BUSY) { if (status & ATA_BUSY) {
printf ("ata%u failed to respond\n", printf("ata%u failed to respond\n",
port[num].port_no); port[num].port_no);
return n; return n;
} }
#ifdef CONFIG_LBA48 #ifdef CONFIG_LBA48
if (lba48) { if (lba48) {
/* write high bits */ /* write high bits */
sata_outb (0, port[num].ioaddr.nsect_addr); sata_outb(0, port[num].ioaddr.nsect_addr);
sata_outb ((blknr >> 24) & 0xFF, sata_outb((blknr >> 24) & 0xFF,
port[num].ioaddr.lbal_addr); port[num].ioaddr.lbal_addr);
sata_outb ((blknr >> 32) & 0xFF, sata_outb((blknr >> 32) & 0xFF,
port[num].ioaddr.lbam_addr); port[num].ioaddr.lbam_addr);
sata_outb ((blknr >> 40) & 0xFF, sata_outb((blknr >> 40) & 0xFF,
port[num].ioaddr.lbah_addr); port[num].ioaddr.lbah_addr);
} }
#endif #endif
sata_outb (1, port[num].ioaddr.nsect_addr); sata_outb(1, port[num].ioaddr.nsect_addr);
sata_outb ((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr); sata_outb((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr); sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr); sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
#ifdef CONFIG_LBA48 #ifdef CONFIG_LBA48
if (lba48) { if (lba48) {
sata_outb (ATA_LBA, port[num].ioaddr.device_addr); sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
sata_outb (ATA_CMD_WRITE_EXT, sata_outb(ATA_CMD_WRITE_EXT,
port[num].ioaddr.command_addr); port[num].ioaddr.command_addr);
} else } else
#endif #endif
{ {
sata_outb (ATA_LBA | ((blknr >> 24) & 0xF), sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
port[num].ioaddr.device_addr); port[num].ioaddr.device_addr);
sata_outb (ATA_CMD_WRITE, sata_outb(ATA_CMD_WRITE,
port[num].ioaddr.command_addr); port[num].ioaddr.command_addr);
} }
msleep (50); mdelay(50);
/*may take up to 4 sec */ /* may take up to 4 sec */
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000); status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
!= ATA_STAT_DRQ) { != ATA_STAT_DRQ) {
printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n", printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
device, (ulong) blknr, status); device, (ulong) blknr, status);
return (n); return n;
} }
output_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS); output_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
sata_inb (port[num].ioaddr.altstatus_addr); sata_inb(port[num].ioaddr.altstatus_addr);
udelay (50); udelay(50);
++n; ++n;
++blknr; ++blknr;

48
drivers/block/ata_piix.h
View File

@ -1,12 +1,6 @@
#ifndef __ATA_PIIX_H__ #ifndef __ATA_PIIX_H__
#define __ATA_PIIX_H__ #define __ATA_PIIX_H__
#if (DEBUG_SATA)
#define PRINTF(fmt,args...) printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif
struct sata_ioports { struct sata_ioports {
unsigned long cmd_addr; unsigned long cmd_addr;
unsigned long data_addr; unsigned long data_addr;
@ -36,45 +30,43 @@ struct sata_port {
}; };
/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/ /***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
#ifdef SATA_DECL /*SATA library specific declarations */ #ifdef SATA_DECL /* SATA library specific declarations */
inline void inline void ata_dump_id(u16 *id)
ata_dump_id (u16 * id)
{ {
PRINTF ("49 = 0x%04x " debug("49 = 0x%04x "
"53 = 0x%04x " "53 = 0x%04x "
"63 = 0x%04x " "63 = 0x%04x "
"64 = 0x%04x " "64 = 0x%04x "
"75 = 0x%04x \n", id[49], id[53], id[63], id[64], id[75]); "75 = 0x%04x\n", id[49], id[53], id[63], id[64], id[75]);
PRINTF ("80 = 0x%04x " debug("80 = 0x%04x "
"81 = 0x%04x " "81 = 0x%04x "
"82 = 0x%04x " "82 = 0x%04x "
"83 = 0x%04x " "83 = 0x%04x "
"84 = 0x%04x \n", id[80], id[81], id[82], id[83], id[84]); "84 = 0x%04x\n", id[80], id[81], id[82], id[83], id[84]);
PRINTF ("88 = 0x%04x " "93 = 0x%04x\n", id[88], id[93]); debug("88 = 0x%04x " "93 = 0x%04x\n", id[88], id[93]);
} }
#endif #endif
#ifdef SATA_DECL /*SATA library specific declarations */ #ifdef SATA_DECL /*SATA library specific declarations */
int sata_bus_softreset (int num); int sata_bus_softreset(int num);
void sata_identify (int num, int dev); void sata_identify(int num, int dev);
void sata_port (struct sata_ioports *ioport); void sata_port(struct sata_ioports *ioport);
void set_Feature_cmd (int num, int dev); void set_Feature_cmd(int num, int dev);
int sata_devchk (struct sata_ioports *ioaddr, int dev); int sata_devchk(struct sata_ioports *ioaddr, int dev);
void dev_select (struct sata_ioports *ioaddr, int dev); void dev_select(struct sata_ioports *ioaddr, int dev);
u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max); u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max);
u8 sata_chk_status (struct sata_ioports *ioaddr); u8 sata_chk_status(struct sata_ioports *ioaddr);
ulong sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buffer); ulong sata_read(int device, ulong blknr,lbaint_t blkcnt, void *buffer);
ulong sata_write (int device,ulong blknr, lbaint_t blkcnt, void * buffer); ulong sata_write(int device,ulong blknr, lbaint_t blkcnt, void *buffer);
void msleep (int count);
#endif #endif
/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/ /************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
#ifdef DRV_DECL /*Driver specific declaration */ #ifdef DRV_DECL /* Driver specific declaration */
int init_sata (int dev); int init_sata(int dev);
#endif #endif
#ifdef DRV_DECL /*Defines Driver Specific variables */ #ifdef DRV_DECL /* Defines Driver Specific variables */
struct sata_port port[CONFIG_SYS_SATA_MAXBUS]; struct sata_port port[CONFIG_SYS_SATA_MAXBUS];
#endif #endif