mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-10 12:39:22 -04:00
Writing is working, but there's still a bug that causes the data written to
start at an offset of 4 bytes from the start of the page.
This commit is contained in:
parent
19fdeff433
commit
9187a35b6c
@ -121,7 +121,7 @@ static void delta_read_buf(struct mtd_info *mtd, u_char* const buf, int len)
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return;
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return;
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}
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}
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static void delta_read_word(struct mtd_info *mtd, u_char byte)
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static u16 delta_read_word(struct mtd_info *mtd)
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{
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{
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printf("delta_write_byte: UNIMPLEMENTED.\n");
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printf("delta_write_byte: UNIMPLEMENTED.\n");
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}
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}
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@ -179,6 +179,66 @@ static void delta_wait_event(unsigned long event)
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}
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}
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}
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}
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static unsigned long delta_wait_event2(unsigned long event)
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{
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unsigned long ndsr;
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if(!event)
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return;
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while(1) {
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ndsr = NDSR;
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if(ndsr & event) {
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NDSR |= event;
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break;
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}
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}
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return ndsr;
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}
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/* we don't always wan't to do this */
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static void delta_new_cmd()
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{
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/* Clear NDSR */
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NDSR = 0xFFF;
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/* apparently NDCR[NDRUN] needs to be set before writing to NDCBx */
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if(!(NDCR & NDCR_ND_RUN)) {
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NDCR |= NDCR_ND_RUN;
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while(1) {
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if(NDSR & NDSR_WRCMDREQ) {
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NDSR |= NDSR_WRCMDREQ; /* Ack */
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break;
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}
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}
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}
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}
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static int delta_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
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{
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/* unsigned long timeo; */
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unsigned long ndsr=0, event=0;
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unsigned long dummy;
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/* mk@tbd set appropriate timeouts */
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/* if (state == FL_ERASING) */
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/* timeo = CFG_HZ * 400; */
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/* else */
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/* timeo = CFG_HZ * 20; */
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if(state == FL_WRITING) {
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event = NDSR_CS0_CMDD | NDSR_CS0_BBD;
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} else if(state == FL_ERASING) {
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/* do something else */
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}
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/* dummy = NDDB; */
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ndsr = delta_wait_event2(event);
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if(ndsr & NDSR_CS0_BBD)
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return(0x1); /* Status Read error */
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return 0;
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}
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/* this is really monahans, not board specific ... */
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/* this is really monahans, not board specific ... */
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static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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int column, int page_addr)
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int column, int page_addr)
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@ -191,29 +251,13 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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bytes_read = 0;
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bytes_read = 0;
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read_buf = 0;
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read_buf = 0;
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/* Clear NDSR */
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NDSR = 0xFFF;
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/* apparently NDCR[NDRUN] needs to be set before writing to NDCBx */
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NDCR |= NDCR_ND_RUN;
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/* wait for write command request
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* hmm, might be nice if this could time-out. mk@tbd
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*/
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while(1) {
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if(NDSR & NDSR_WRCMDREQ) {
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NDSR |= NDSR_WRCMDREQ; /* Ack */
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break;
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}
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}
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/* if command is a double byte cmd, we set bit double cmd bit 19 */
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/* if command is a double byte cmd, we set bit double cmd bit 19 */
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/* command2 = (command>>8) & 0xFF; */
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/* command2 = (command>>8) & 0xFF; */
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/* ndcb0 = command | ((command2 ? 1 : 0) << 19); *\/ */
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/* ndcb0 = command | ((command2 ? 1 : 0) << 19); *\/ */
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switch (command) {
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switch (command) {
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case NAND_CMD_READ0:
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case NAND_CMD_READ0:
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delta_new_cmd();
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ndcb0 = (NAND_CMD_READ0 | (4<<16));
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ndcb0 = (NAND_CMD_READ0 | (4<<16));
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column >>= 1; /* adjust for 16 bit bus */
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column >>= 1; /* adjust for 16 bit bus */
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ndcb1 = (((column>>1) & 0xff) |
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ndcb1 = (((column>>1) & 0xff) |
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@ -223,22 +267,24 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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event = NDSR_RDDREQ;
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event = NDSR_RDDREQ;
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break;
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break;
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case NAND_CMD_READID:
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case NAND_CMD_READID:
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delta_new_cmd();
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printk("delta_cmdfunc: NAND_CMD_READID.\n");
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printk("delta_cmdfunc: NAND_CMD_READID.\n");
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ndcb0 = (NAND_CMD_READID | (3 << 21) | (1 << 16)); /* addr cycles*/
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ndcb0 = (NAND_CMD_READID | (3 << 21) | (1 << 16)); /* addr cycles*/
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event = NDSR_RDDREQ;
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event = NDSR_RDDREQ;
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break;
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break;
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case NAND_CMD_PAGEPROG:
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case NAND_CMD_PAGEPROG:
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/* sent as a multicommand in NAND_CMD_SEQIN */
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printk("delta_cmdfunc: NAND_CMD_PAGEPROG.\n");
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printk("delta_cmdfunc: NAND_CMD_PAGEPROG.\n");
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ndcb0 = (NAND_CMD_PAGEPROG | (1 << 21));
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goto end;
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break;
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case NAND_CMD_ERASE1:
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case NAND_CMD_ERASE1:
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case NAND_CMD_ERASE2:
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case NAND_CMD_ERASE2:
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printf("delta_cmdfunc: NAND_CMD_ERASEx unimplemented.\n");
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printf("delta_cmdfunc: NAND_CMD_ERASEx unimplemented.\n");
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break;
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goto end;
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case NAND_CMD_SEQIN:
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case NAND_CMD_SEQIN:
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/* send PAGE_PROG command(0x80) */
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/* send PAGE_PROG command(0x1080) */
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delta_new_cmd();
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printf("delta_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG.\n");
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printf("delta_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG.\n");
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ndcb0 = (NAND_CMD_SEQIN | (1<<21) | (3<<16));
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ndcb0 = (0x1080 | (1<<25) | (1<<21) | (1<<19) | (4<<16));
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column >>= 1; /* adjust for 16 bit bus */
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column >>= 1; /* adjust for 16 bit bus */
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ndcb1 = (((column>>1) & 0xff) |
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ndcb1 = (((column>>1) & 0xff) |
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((page_addr<<8) & 0xff00) |
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((page_addr<<8) & 0xff00) |
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@ -286,6 +332,7 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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* here, so the next read access by the nand code
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* here, so the next read access by the nand code
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* yields the right one.
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* yields the right one.
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*/
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*/
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delta_new_cmd();
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ndcb0 = (NAND_CMD_STATUS | (4<<21));
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ndcb0 = (NAND_CMD_STATUS | (4<<21));
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event = NDSR_RDDREQ;
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event = NDSR_RDDREQ;
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NDCB0 = ndcb0;
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NDCB0 = ndcb0;
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@ -307,7 +354,7 @@ static void delta_cmdfunc(struct mtd_info *mtd, unsigned command,
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NDCB0 = ndcb1;
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NDCB0 = ndcb1;
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NDCB0 = ndcb2;
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NDCB0 = ndcb2;
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/* wait for event */
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wait_event:
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delta_wait_event(event);
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delta_wait_event(event);
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end:
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end:
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return;
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return;
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@ -502,13 +549,14 @@ void board_nand_init(struct nand_chip *nand)
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nand->eccmode = NAND_ECC_SOFT;
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nand->eccmode = NAND_ECC_SOFT;
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nand->chip_delay = NAND_DELAY_US;
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nand->chip_delay = NAND_DELAY_US;
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nand->options = NAND_BUSWIDTH_16;
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nand->options = NAND_BUSWIDTH_16;
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nand->waitfunc = delta_wait;
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nand->read_byte = delta_read_byte;
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nand->read_byte = delta_read_byte;
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nand->write_byte = delta_write_byte;
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nand->write_byte = delta_write_byte;
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nand->read_word = delta_read_word;
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nand->read_word = delta_read_word;
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nand->write_word = delta_write_word;
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nand->write_word = delta_write_word;
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nand->read_buf = delta_read_buf;
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nand->read_buf = delta_read_buf;
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nand->write_buf = delta_write_buf;
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nand->write_buf = delta_write_buf;
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nand->cmdfunc = delta_cmdfunc;
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nand->cmdfunc = delta_cmdfunc;
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}
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}
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