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MIPS: fix inconsistency in config option for cache operation mode

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Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to
use the new config option in dcache_enable().

Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
This commit is contained in:
Daniel Schwierzeck 2012-04-02 02:57:55 +00:00 committed by Marek Vasut
parent 71919cf153
commit 979cfeaf36
1 changed files with 5 additions and 1 deletions
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6
arch/mips/cpu/mips32/cache.S
View File

@ -30,6 +30,10 @@
#include <asm/addrspace.h> #include <asm/addrspace.h>
#include <asm/cacheops.h> #include <asm/cacheops.h>
#ifndef CONFIG_SYS_MIPS_CACHE_MODE
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
#define RA t8 #define RA t8
/* /*
@ -224,7 +228,7 @@ LEAF(dcache_enable)
mfc0 t0, CP0_CONFIG mfc0 t0, CP0_CONFIG
ori t0, CONF_CM_CMASK ori t0, CONF_CM_CMASK
xori t0, CONF_CM_CMASK xori t0, CONF_CM_CMASK
ori t0, CONF_CM_CACHABLE_NONCOHERENT ori t0, CONFIG_SYS_MIPS_CACHE_MODE
mtc0 t0, CP0_CONFIG mtc0 t0, CP0_CONFIG
jr ra jr ra
END(dcache_enable) END(dcache_enable)