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Minor fixes to PM854 board

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Patch by Josef Wagner, 03 Aug 2005
This commit is contained in:
Wolfgang Denk 2005-08-05 11:47:10 +02:00
parent 2c61f14c60
commit 992b402bbf
3 changed files with 22 additions and 13 deletions
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3
CHANGELOG
View File

@ -2,6 +2,9 @@
Changes for U-Boot 1.1.3: Changes for U-Boot 1.1.3:
====================================================================== ======================================================================
* Minor fixes to PM854 board
Patch by Josef Wagner, 03 Aug 2005
* Adjust configuration of XENIAX board * Adjust configuration of XENIAX board
(chip select and GPIO required for USB operation) (chip select and GPIO required for USB operation)

2
board/pm854/Makefile
View File

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a LIB = lib$(BOARD).a
OBJS := $(BOARD).o flash.o OBJS := $(BOARD).o
SOBJS := init.o SOBJS := init.o
#SOBJS := #SOBJS :=

30
include/configs/PM854.h
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@ -102,7 +102,7 @@
/* /*
* Determine DDR configuration from I2C interface. * Determine DDR configuration from I2C interface.
*/ */
#define SPD_EEPROM_ADDRESS 0x51 /* DDR DIMM */ #define SPD_EEPROM_ADDRESS 0x58 /* DDR DIMM */
#else #else
/* /*
@ -144,6 +144,12 @@
#undef CFG_RAMBOOT #undef CFG_RAMBOOT
#endif #endif
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
#define CFG_FLASH_EMPTY_INFO
#undef CONFIG_CLOCKS_IN_MHZ
/* /*
* Local Bus Definitions * Local Bus Definitions
*/ */
@ -251,16 +257,16 @@
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MPC85XX_TSEC1 1 #define CONFIG_MPC85XX_TSEC1 1
#define CONFIG_MPC85XX_TSEC2 1 #define CONFIG_MPC85XX_TSEC2 1
#define TSEC1_PHY_ADDR 2 #define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 3 #define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0 #define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0 #define TSEC2_PHYIDX 0
#define CONFIG_MPC85XX_FEC 1 #define CONFIG_MPC85XX_FEC 1
#define FEC_PHY_ADDR 1 #define FEC_PHY_ADDR 3
#define FEC_PHYIDX 0 #define FEC_PHYIDX 0
#define CONFIG_ETHPRIME "MOTO ENET0" #define CONFIG_ETHPRIME "ENET0"
#define CONFIG_HAS_ETH1 1 #define CONFIG_HAS_ETH1 1
#define CONFIG_HAS_ETH2 1 #define CONFIG_HAS_ETH2 1
@ -382,13 +388,13 @@
#define CONFIG_ETH2ADDR 00:40:42:01:00:02 #define CONFIG_ETH2ADDR 00:40:42:01:00:02
#endif #endif
#define CONFIG_ROOTPATH /opt/eldk/ppc_85xx
#define CONFIG_BOOTFILE pm854/uImage
#define CONFIG_HOSTNAME pm854
#define CONFIG_IPADDR 192.168.0.103 #define CONFIG_IPADDR 192.168.0.103
#define CONFIG_SERVERIP 192.168.0.64
#define CONFIG_HOSTNAME PM854
#define CONFIG_ROOTPATH /opt/eldk30/ppc_82xx
#define CONFIG_BOOTFILE uImage
#define CONFIG_SERVERIP 192.168.0.54
#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NETMASK 255.255.255.0
@ -403,7 +409,7 @@
"netdev=eth0\0" \ "netdev=eth0\0" \
"consoledev=ttyS0\0" \ "consoledev=ttyS0\0" \
"ramdiskaddr=400000\0" \ "ramdiskaddr=400000\0" \
"ramdiskfile=uRamdisk\0" "ramdiskfile=pm854/uRamdisk\0"
#define CONFIG_NFSBOOTCOMMAND \ #define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \ "setenv bootargs root=/dev/nfs rw " \