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* Make sure to use a bus clock divider of 2 only when running TQM8xxM
modules at CPU clock frequencies above 66 MHz. * Optimize flash programming speed for LWMON (by another 100% :-)
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@ -2,6 +2,11 @@
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Changes since U-Boot 1.0.1:
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======================================================================
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* Make sure to use a bus clock divider of 2 only when running TQM8xxM
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modules at CPU clock frequencies above 66 MHz.
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* Optimize flash programming speed for LWMON (by another 100% :-)
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* Patch by Jian Zhang, 3 Feb 2004:
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- Changed the incorrect FAT12BUFSIZE
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- data_begin in fsdata can be negative. Changed it to be short.
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@ -226,6 +226,7 @@ int get_clocks_866 (void)
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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char tmp[64];
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long cpuclk = 0;
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long sccr_reg;
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if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0)
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cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
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@ -238,10 +239,19 @@ int get_clocks_866 (void)
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gd->cpu_clk = measure_gclk ();
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#endif
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if ((immr->im_clkrst.car_sccr & SCCR_EBDF11) == 0)
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/* if cpu clock <= 66 MHz then set bus division factor to 1,
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* otherwise set it to 2
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*/
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sccr_reg = immr->im_clkrst.car_sccr;
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sccr_reg &= ~SCCR_EBDF11;
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if (gd->cpu_clk <= 66000000) {
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sccr_reg |= SCCR_EBDF00; /* bus division factor = 1 */
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gd->bus_clk = gd->cpu_clk;
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else
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} else {
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sccr_reg |= SCCR_EBDF01; /* bus division factor = 2 */
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gd->bus_clk = gd->cpu_clk / 2;
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}
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immr->im_clkrst.car_sccr = sccr_reg;
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return (0);
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}
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@ -284,7 +284,11 @@
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#define CFG_FLASH_WRITE_TOUT 600 /* Timeout for Flash Write (in ms) */
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#define CFG_FLASH_USE_BUFFER_WRITE
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#define CFG_FLASH_BUFFER_WRITE_TOUT 2048 /* Timeout for Flash Buffer Write (in ms) */
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#define CFG_FLASH_BUFFER_SIZE 32 /* Buffer size */
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/* Buffer size.
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We have two flash devices connected in parallel.
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Each device incorporates a Write Buffer of 32 bytes.
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*/
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#define CFG_FLASH_BUFFER_SIZE (2*32)
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#if 1
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/* Put environment in flash which is much faster to boot */
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