minix/u-boot
1
0
Fork 0
mirror of https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git synced 2025-09-11 05:02:26 -04:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx

Browse Source
This commit is contained in:
Wolfgang Denk 2008-10-30 20:57:46 +01:00
commit a7faab9d11
7 changed files with 4 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
board/freescale/mpc8610hpcd/mpc8610hpcd.c
View File

@ -36,10 +36,6 @@
#include "../common/pixis.h" #include "../common/pixis.h"
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
void sdram_init(void); void sdram_init(void);
long int fixed_sdram(void); long int fixed_sdram(void);
void mpc8610hpcd_diu_init(void); void mpc8610hpcd_diu_init(void);
@ -134,13 +130,6 @@ initdram(int board_type)
return dram_size; return dram_size;
#endif #endif
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
/*
* Initialize and enable DDR ECC.
*/
ddr_enable_ecc(dram_size);
#endif
puts(" DDR: "); puts(" DDR: ");
return dram_size; return dram_size;
} }

3
board/freescale/mpc8641hpcn/law.c
View File

@ -55,9 +55,6 @@ struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
SET_LAW((CONFIG_SYS_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC), SET_LAW((CONFIG_SYS_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC),
#if !defined(CONFIG_SPD_EEPROM)
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
#endif
SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
}; };

11
board/freescale/mpc8641hpcn/mpc8641hpcn.c
View File

@ -33,10 +33,6 @@
#include "../common/pixis.h" #include "../common/pixis.h"
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
long int fixed_sdram(void); long int fixed_sdram(void);
int board_early_init_f(void) int board_early_init_f(void)
@ -70,13 +66,6 @@ initdram(int board_type)
return dram_size; return dram_size;
#endif #endif
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
/*
* Initialize and enable DDR ECC.
*/
ddr_enable_ecc(dram_size);
#endif
puts(" DDR: "); puts(" DDR: ");
return dram_size; return dram_size;
} }

11
board/sbc8641d/sbc8641d.c
View File

@ -38,10 +38,6 @@
#include <libfdt.h> #include <libfdt.h>
#include <fdt_support.h> #include <fdt_support.h>
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc (unsigned int dram_size);
#endif
long int fixed_sdram (void); long int fixed_sdram (void);
int board_early_init_f (void) int board_early_init_f (void)
@ -71,13 +67,6 @@ phys_size_t initdram (int board_type)
return dram_size; return dram_size;
#endif #endif
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
/*
* Initialize and enable DDR ECC.
*/
ddr_enable_ecc (dram_size);
#endif
puts (" DDR: "); puts (" DDR: ");
return dram_size; return dram_size;
} }

20
cpu/mpc86xx/start.S
View File

@ -202,8 +202,12 @@ boot_warm:
mtmsr 0 mtmsr 0
#endif #endif
/* Invalidate BATs */
bl invalidate_bats bl invalidate_bats
sync sync
/* Invalidate all of TLB before MMU turn on */
bl clear_tlbs
sync
#ifdef CONFIG_SYS_L2 #ifdef CONFIG_SYS_L2
/* init the L2 cache */ /* init the L2 cache */
@ -275,7 +279,6 @@ in_flash:
/* setup the rest of the bats */ /* setup the rest of the bats */
bl setup_bats bl setup_bats
bl clear_tlbs
sync sync
#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
@ -617,7 +620,6 @@ relocate_code:
mr r1, r3 /* Set new stack pointer */ mr r1, r3 /* Set new stack pointer */
mr r9, r4 /* Save copy of Global Data pointer */ mr r9, r4 /* Save copy of Global Data pointer */
mr r2, r9 /* Save for DECLARE_GLOBAL_DATA_PTR */
mr r10, r5 /* Save copy of Destination Address */ mr r10, r5 /* Save copy of Destination Address */
mr r3, r5 /* Destination Address */ mr r3, r5 /* Destination Address */
@ -644,16 +646,6 @@ relocate_code:
/* /*
* Now relocate code * Now relocate code
*/ */
#ifdef CONFIG_ECC
bl board_relocate_rom
sync
mr r3, r10 /* Destination Address */
lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
lwz r5, GOT(__init_end)
sub r5, r5, r4
li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
#else
cmplw cr1,r3,r4 cmplw cr1,r3,r4
addi r0,r5,3 addi r0,r5,3
srwi. r0,r0,2 srwi. r0,r0,2
@ -675,7 +667,6 @@ relocate_code:
3: lwzu r0,-4(r8) 3: lwzu r0,-4(r8)
stwu r0,-4(r7) stwu r0,-4(r7)
bdnz 3b bdnz 3b
#endif
/* /*
* Now flush the cache: note that we must start from a cache aligned * Now flush the cache: note that we must start from a cache aligned
* address. Otherwise we might miss one cache line. * address. Otherwise we might miss one cache line.
@ -708,9 +699,6 @@ relocate_code:
blr blr
in_ram: in_ram:
#ifdef CONFIG_ECC
bl board_init_ecc
#endif
/* /*
* Relocation Function, r14 point to got2+0x8000 * Relocation Function, r14 point to got2+0x8000
* *

9
include/configs/MPC8610HPCD.h
View File

@ -126,15 +126,6 @@
#define CONFIG_SYS_DDR_ERR_DIS 0x00000000 #define CONFIG_SYS_DDR_ERR_DIS 0x00000000
#define CONFIG_SYS_DDR_SBE 0x000f0000 #define CONFIG_SYS_DDR_SBE 0x000f0000
/*
* FIXME: Not used in fixed_sdram function
*/
#define CONFIG_SYS_DDR_MODE 0x00000022
#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000
#define CONFIG_SYS_DDR_CS2_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS3_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS4_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS5_BNDS 0x00000FFF /* Not done */
#endif #endif

11
include/configs/MPC8641HPCN.h
View File

@ -139,17 +139,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_DDR_CONTROL 0xe3008000 /* Type = DDR2 */ #define CONFIG_SYS_DDR_CONTROL 0xe3008000 /* Type = DDR2 */
#define CONFIG_SYS_DDR_CONTROL2 0x04400000 #define CONFIG_SYS_DDR_CONTROL2 0x04400000
/*
* FIXME: Not used in fixed_sdram function
*/
#define CONFIG_SYS_DDR_MODE 0x00000022
#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000
#define CONFIG_SYS_DDR_CS2_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS3_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS4_BNDS 0x00000FFF /* Not done */
#define CONFIG_SYS_DDR_CS5_BNDS 0x00000FFF /* Not done */
#define CONFIG_ID_EEPROM #define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_ID_EEPROM #define CONFIG_ID_EEPROM