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sh: Fix compile warning

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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu 2008-09-18 19:34:36 +09:00
parent 4a065abf92
commit b5d10a1352
9 changed files with 133 additions and 100 deletions
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56
board/ms7722se/lowlevel_init.S
View File

@ -43,48 +43,61 @@
lowlevel_init:
mov.l CCR_A, r1 ! Address of Cache Control Register
mov.l CCR_D, r0 ! Instruction Cache Invalidate
/* Address of Cache Control Register */
mov.l CCR_A, r1
/*Instruction Cache Invalidate */
mov.l CCR_D, r0
mov.l r0, @r1
mov.l MMUCR_A, r1 ! Address of MMU Control Register
mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
/* Address of MMU Control Register */
mov.l MMUCR_A, r1
/* TI == TLB Invalidate bit */
mov.l MMUCR_D, r0
mov.l r0, @r1
mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
mov.l MSTPCR0_D, r0 !
/* Address of Power Control Register 0 */
mov.l MSTPCR0_A, r1
mov.l MSTPCR0_D, r0
mov.l r0, @r1
mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
mov.l MSTPCR2_D, r0 !
/* Address of Power Control Register 2 */
mov.l MSTPCR2_A, r1
mov.l MSTPCR2_D, r0
mov.l r0, @r1
mov.l SBSCR_A, r1 !
mov.w SBSCR_D, r0 !
mov.l SBSCR_A, r1
mov.w SBSCR_D, r0
mov.w r0, @r1
mov.l PSCR_A, r1 !
mov.w PSCR_D, r0 !
mov.l PSCR_A, r1
mov.w PSCR_D, r0
mov.w r0, @r1
! mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
! mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
/* 0xA4520004 (Watchdog Control / Status Register) */
! mov.l RWTCSR_A, r1
/* 0xA507 -> timer_STOP/WDT_CLK=max */
! mov.w RWTCSR_D_1, r0
! mov.w r0, @r1
mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
/* 0xA4520000 (Watchdog Count Register) */
mov.l RWTCNT_A, r1
/*0x5A00 -> Clear */
mov.w RWTCNT_D, r0
mov.w r0, @r1
mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
/* 0xA4520004 (Watchdog Control / Status Register) */
mov.l RWTCSR_A, r1
/* 0xA504 -> timer_STOP/CLK=500ms */
mov.w RWTCSR_D_2, r0
mov.w r0, @r1
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
/* 0xA4150000 Frequency control register */
mov.l FRQCR_A, r1
mov.l FRQCR_D, r0 !
mov.l r0, @r1
mov.l CCR_A, r1 ! Address of Cache Control Register
mov.l CCR_D_2, r0 ! ??
mov.l CCR_A, r1
mov.l CCR_D_2, r0
mov.l r0, @r1
bsc_init:
@ -290,5 +303,6 @@ PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA507
RWTCNT_D: .word 0x5A00
.align 2
SR_MASK_D: .long 0xEFFFFF0F

1
board/r7780mp/lowlevel_init.S
View File

@ -325,6 +325,7 @@ repeat2:
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA507
RWTCNT_D: .word 0x5A00
.align 2
BBG_PMMR_A: .long 0xFF800010
BBG_PMSR1_A: .long 0xFF800014

4
board/sh7785lcr/selfcheck.c
View File

@ -84,7 +84,7 @@ static void test_net(void)
if (data == 0x816910ec)
printf("Ethernet OK\n");
else
printf("Ethernet NG, data = %08x\n", data);
printf("Ethernet NG, data = %08x\n", (unsigned int)data);
}
static void test_sata(void)
@ -96,7 +96,7 @@ static void test_sata(void)
if (data == 0x35121095)
printf("SATA OK\n");
else
printf("SATA NG, data = %08x\n", data);
printf("SATA NG, data = %08x\n", (unsigned int)data);
}
static void test_pci(void)

18
drivers/pci/pci_sh7751.c
View File

@ -23,9 +23,10 @@
*/
#include <common.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <pci.h>
#include <asm/pci.h>
/* Register addresses and such */
#define SH7751_BCR1 (vu_long *)0xFF800000
@ -87,8 +88,8 @@
#define SH7751_PCIPAR (vu_long *)0xFE2001C0
#define SH7751_PCIPDR (vu_long *)0xFE200220
#define p4_in(addr) *(addr)
#define p4_out(data,addr) *(addr) = (data)
#define p4_in(addr) (*addr)
#define p4_out(data, addr) (*addr) = (data)
/* Double word */
int pci_sh4_read_config_dword(struct pci_controller *hose,
@ -103,7 +104,7 @@ int pci_sh4_read_config_dword(struct pci_controller *hose,
}
int pci_sh4_write_config_dword(struct pci_controller *hose,
pci_dev_t dev, int offset, u32 * value)
pci_dev_t dev, int offset, u32 value)
{
u32 par_data = 0x80000000 | dev;
@ -126,15 +127,18 @@ int pci_sh7751_init(struct pci_controller *hose)
/* Double-check some BSC config settings */
/* (Area 3 non-MPX 32-bit, PCI bus pins) */
if ((p4_in(SH7751_BCR1) & 0x20008) == 0x20000) {
printf("SH7751_BCR1 0x%08X\n", p4_in(SH7751_BCR1));
printf("SH7751_BCR1 value is wrong(0x%08X)\n",
(unsigned int)p4_in(SH7751_BCR1));
return 2;
}
if ((p4_in(SH7751_BCR2) & 0xC0) != 0xC0) {
printf("SH7751_BCR2 0x%08X\n", p4_in(SH7751_BCR2));
printf("SH7751_BCR2 value is wrong(0x%08X)\n",
(unsigned int)p4_in(SH7751_BCR2));
return 3;
}
if (p4_in(SH7751_BCR2) & 0x01) {
printf("SH7751_BCR2 0x%08X\n", p4_in(SH7751_BCR2));
printf("SH7751_BCR2 value is wrong(0x%08X)\n",
(unsigned int)p4_in(SH7751_BCR2));
return 4;
}

15
drivers/pci/pci_sh7780.c
View File

@ -25,9 +25,10 @@
#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/pci.h>
#include <asm/io.h>
#define SH7780_VENDOR_ID 0x1912
#define SH7780_DEVICE_ID 0x0002
@ -41,10 +42,10 @@
#define SH7780_PCICR_PRST 0x00000002
#define SH7780_PCICR_CFIN 0x00000001
#define p4_in(addr) *((vu_long *)addr)
#define p4_out(data,addr) *(vu_long *)(addr) = (data)
#define p4_inw(addr) *((vu_short *)addr)
#define p4_outw(data,addr) *(vu_short *)(addr) = (data)
#define p4_in(addr) (*(vu_long *)addr)
#define p4_out(data, addr) (*(vu_long *)addr) = (data)
#define p4_inw(addr) (*(vu_short *)addr)
#define p4_outw(data, addr) (*(vu_short *)addr) = (data)
int pci_sh4_read_config_dword(struct pci_controller *hose,
pci_dev_t dev, int offset, u32 *value)
@ -74,7 +75,7 @@ int pci_sh7780_init(struct pci_controller *hose)
if (p4_inw(SH7780_PCIVID) != SH7780_VENDOR_ID
&& p4_inw(SH7780_PCIDID) != SH7780_DEVICE_ID) {
printf("PCI: Unknown PCI host bridge.\n");
return;
return -1;
}
printf("PCI: SH7780 PCI host bridge found.\n");

2
include/asm-sh/cache.h
View File

@ -3,6 +3,8 @@
#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
int cache_control(unsigned int cmd);
#define L1_CACHE_BYTES 32
struct __large_struct { unsigned long buf[100]; };
#define __m(x) (*(struct __large_struct *)(x))

13
include/asm-sh/io.h
View File

@ -121,6 +121,13 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
#define insw_p(port, to, len) insw(port, to, len)
#define insl_p(port, to, len) insl(port, to, len)
/* for U-Boot PCI */
#define out_8(port, val) outb(val, port)
#define out_le16(port, val) outw(val, port)
#define out_le32(port, val) outl(val, port)
#define in_8(port) inb(port)
#define in_le16(port) inw(port)
#define in_le32(port) inl(port)
/*
* ioremap and friends.
*
@ -180,8 +187,10 @@ extern void _memset_io(unsigned long, int, size_t);
#ifdef __mem_pci
#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
#define readw(c)\
({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
#define readl(c)\
({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))

1
include/asm-sh/pci.h
View File

@ -36,6 +36,7 @@ int pci_sh7780_init(struct pci_controller *hose);
#error "Not support PCI."
#endif
int pci_sh4_init(struct pci_controller *hose);
/* PCI dword read for sh4 */
int pci_sh4_read_config_dword(struct pci_controller *hose,
pci_dev_t dev, int offset, u32 *value);

7
lib_sh/bootm.c
View File

@ -48,11 +48,12 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
/* Linux kernel load address */
void (*kernel) (void) = (void (*)(void))images->ep;
/* empty_zero_page */
unsigned char *param = (unsigned char *)image_get_ep(images);
unsigned char *param
= (unsigned char *)image_get_load(images->legacy_hdr_os);
/* Linux kernel command line */
unsigned char *cmdline = param + 0x100;
char *cmdline = (char *)param + 0x100;
/* PAGE_SIZE */
unsigned long size = images->ep - image_get_ep(images);
unsigned long size = images->ep - (unsigned long)param;
char *bootargs = getenv("bootargs");
/* Setup parameters */