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- AR405 config updated.

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This commit is contained in:
stroese 2003-07-11 08:13:25 +00:00
parent 155cb0104a
commit c5d2290642
1 changed files with 11 additions and 8 deletions
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17
include/configs/AR405.h
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@ -66,8 +66,10 @@
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_COMMANDS \ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
(CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV) CFG_CMD_PCI | \
CFG_CMD_IRQ | \
CFG_CMD_ELF )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h> #include <cmd_confdefs.h>
@ -227,15 +229,16 @@
#define CFG_EBC_PB5CR 0xFF85A000 /* BAS=0xFF8,BS=4MB,BU=R/W,BW=16bit */ #define CFG_EBC_PB5CR 0xFF85A000 /* BAS=0xFF8,BS=4MB,BU=R/W,BW=16bit */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in RAM) * Definitions for initial stack pointer and data area (in data cache)
*/ */
#define CFG_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ #define CFG_INIT_DCACHE_CS 7 /* use cs # 7 for data cache memory */
#define CFG_INIT_RAM_END 0x0f00 /* End of used area in RAM */
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ #define CFG_INIT_RAM_ADDR 0x40000000 /* use data cache */
#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/* /*
* Internal Definitions * Internal Definitions
* *