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arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

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The push / pop instructions used in this file are available only with
more recent tool chains:

cache.S: Assembler messages:
cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'

Change push/pop into stmfd/ldmfd instructions to support older
versions of binutils as well.

I verified that the modified source code generates exactly the same
binary code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rix <tom@bumblecow.com>
This commit is contained in:
Wolfgang Denk 2010-06-18 15:55:15 +02:00
parent 1f241263e0
commit cd040a4953
1 changed files with 4 additions and 4 deletions
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8
arch/arm/cpu/arm_cortexa8/omap3/cache.S
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@ -130,7 +130,7 @@ finished_inval:
l2_cache_enable: l2_cache_enable:
push {r0, r1, r2, lr} stmfd r13!, {r0, r1, r2, lr}
@ ES2 onwards we can disable/enable L2 ourselves @ ES2 onwards we can disable/enable L2 ourselves
bl get_cpu_rev bl get_cpu_rev
cmp r0, #CPU_3XX_ES20 cmp r0, #CPU_3XX_ES20
@ -157,11 +157,11 @@ l2_cache_enable_EARLIER_THAN_ES2:
mov ip, r3 mov ip, r3
str r3, [sp, #4] str r3, [sp, #4]
l2_cache_enable_END: l2_cache_enable_END:
pop {r1, r2, r3, pc} ldmfd r13!, {r1, r2, r3, pc}
l2_cache_disable: l2_cache_disable:
push {r0, r1, r2, lr} stmfd r13!, {r0, r1, r2, lr}
@ ES2 onwards we can disable/enable L2 ourselves @ ES2 onwards we can disable/enable L2 ourselves
bl get_cpu_rev bl get_cpu_rev
cmp r0, #CPU_3XX_ES20 cmp r0, #CPU_3XX_ES20
@ -188,4 +188,4 @@ l2_cache_disable_EARLIER_THAN_ES2:
mov ip, r3 mov ip, r3
str r3, [sp, #4] str r3, [sp, #4]
l2_cache_disable_END: l2_cache_disable_END:
pop {r1, r2, r3, pc} ldmfd r13!, {r1, r2, r3, pc}