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Remove bogus msync and use volatile asm.

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This commit is contained in:
Jon Loeliger 2006-08-29 09:48:49 -05:00
parent 778d45049c
commit cd6d73d5b8
1 changed files with 3 additions and 3 deletions
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6
cpu/mpc86xx/spd_sdram.c
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@ -834,7 +834,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
debug("DDR: err_sbe = 0x%08x\n", ddr->err_sbe); debug("DDR: err_sbe = 0x%08x\n", ddr->err_sbe);
#endif #endif
asm("sync;isync"); asm volatile("sync;isync");
udelay(500); udelay(500);
/* /*
@ -1032,7 +1032,7 @@ unsigned int enable_ddr(unsigned int ddr_num)
*/ */
if (config == 0x02) { if (config == 0x02) {
ddr->err_disable = 0x00000000; ddr->err_disable = 0x00000000;
asm("sync;isync;"); asm volatile("sync;isync;");
ddr->err_sbe = 0x00ff0000; ddr->err_sbe = 0x00ff0000;
ddr->err_int_en = 0x0000000d; ddr->err_int_en = 0x0000000d;
sdram_cfg_1 |= 0x20000000; /* ECC_EN */ sdram_cfg_1 |= 0x20000000; /* ECC_EN */
@ -1325,7 +1325,7 @@ ddr_enable_ecc(unsigned int dram_size)
*/ */
debug("DMA DDR: err_disable = 0x%08x\n", ddr1->err_disable); debug("DMA DDR: err_disable = 0x%08x\n", ddr1->err_disable);
ddr1->err_disable = 0x00000000; ddr1->err_disable = 0x00000000;
asm("sync;isync;msync"); asm volatile("sync;isync");
debug("DMA DDR: err_disable = 0x%08x\n", ddr1->err_disable); debug("DMA DDR: err_disable = 0x%08x\n", ddr1->err_disable);
} }