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Support for multiple SGMII/TBI interfaces for TSEC ethernet

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Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Peter Tyser 2008-09-16 10:04:47 -05:00 committed by Andrew Fleming-AFLEMING
parent c0d2f87d6c
commit ce47eb402c
1 changed files with 5 additions and 3 deletions
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8
drivers/net/tsec.c
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@ -283,11 +283,13 @@ uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
/* Configure the TBI for SGMII operation */ /* Configure the TBI for SGMII operation */
static void tsec_configure_serdes(struct tsec_private *priv) static void tsec_configure_serdes(struct tsec_private *priv)
{ {
tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_ANA, /* Access TBI PHY registers at given TSEC register offset as opposed to the
* register offset used for external PHY accesses */
tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
TBIANA_SETTINGS); TBIANA_SETTINGS);
tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_TBICON, tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
TBICON_CLK_SELECT); TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_CR, tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
TBICR_SETTINGS); TBICR_SETTINGS);
} }