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EXYNOS5: FDT : Decode peripheral id

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Api is added to decode peripheral id based on the interrupt number
of the peripheral.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Rajeshwari Shinde 2012-12-26 20:03:11 +00:00 committed by Minkyu Kang
parent c34253d1fc
commit d055911887
3 changed files with 57 additions and 13 deletions
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29
arch/arm/cpu/armv7/exynos/pinmux.c
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@ -22,6 +22,7 @@
*/ */
#include <common.h> #include <common.h>
#include <fdtdec.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h> #include <asm/arch/pinmux.h>
#include <asm/arch/sromc.h> #include <asm/arch/sromc.h>
@ -447,3 +448,31 @@ int exynos_pinmux_config(int peripheral, int flags)
return -1; return -1;
} }
} }
#ifdef CONFIG_OF_CONTROL
static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
{
int err;
u32 cell[3];
err = fdtdec_get_int_array(blob, node, "interrupts", cell,
ARRAY_SIZE(cell));
if (err)
return PERIPH_ID_NONE;
/* check for invalid peripheral id */
if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
return cell[1];
debug(" invalid peripheral id\n");
return PERIPH_ID_NONE;
}
int pinmux_decode_periph_id(const void *blob, int node)
{
if (cpu_is_exynos5())
return exynos5_pinmux_decode_periph_id(blob, node);
else
return PERIPH_ID_NONE;
}
#endif

33
arch/arm/include/asm/arch-exynos/periph.h
View File

@ -25,12 +25,17 @@
#define __ASM_ARM_ARCH_PERIPH_H #define __ASM_ARM_ARCH_PERIPH_H
/* /*
* Peripherals requiring clock/pinmux configuration. List will * Peripherals required for pinmux configuration. List will
* grow with support for more devices getting added. * grow with support for more devices getting added.
* Numbering based on interrupt table.
* *
*/ */
enum periph_id { enum periph_id {
PERIPH_ID_I2C0, PERIPH_ID_UART0 = 51,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
PERIPH_ID_I2C0 = 56,
PERIPH_ID_I2C1, PERIPH_ID_I2C1,
PERIPH_ID_I2C2, PERIPH_ID_I2C2,
PERIPH_ID_I2C3, PERIPH_ID_I2C3,
@ -38,22 +43,24 @@ enum periph_id {
PERIPH_ID_I2C5, PERIPH_ID_I2C5,
PERIPH_ID_I2C6, PERIPH_ID_I2C6,
PERIPH_ID_I2C7, PERIPH_ID_I2C7,
PERIPH_ID_I2S1, PERIPH_ID_SPI0 = 68,
PERIPH_ID_SDMMC0, PERIPH_ID_SPI1,
PERIPH_ID_SPI2,
PERIPH_ID_SDMMC0 = 75,
PERIPH_ID_SDMMC1, PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2, PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3, PERIPH_ID_SDMMC3,
PERIPH_ID_SDMMC4, PERIPH_ID_I2S1 = 99,
PERIPH_ID_SROMC,
PERIPH_ID_SPI0, /* Since following peripherals do
PERIPH_ID_SPI1, * not have shared peripheral interrupts (SPIs)
PERIPH_ID_SPI2, * they are numbered arbitiraly after the maximum
* SPIs Exynos has (128)
*/
PERIPH_ID_SROMC = 128,
PERIPH_ID_SPI3, PERIPH_ID_SPI3,
PERIPH_ID_SPI4, PERIPH_ID_SPI4,
PERIPH_ID_UART0, PERIPH_ID_SDMMC4,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
PERIPH_ID_COUNT, PERIPH_ID_COUNT,
PERIPH_ID_NONE = -1, PERIPH_ID_NONE = -1,

8
arch/arm/include/asm/arch-exynos/pinmux.h
View File

@ -55,4 +55,12 @@ enum {
*/ */
int exynos_pinmux_config(int peripheral, int flags); int exynos_pinmux_config(int peripheral, int flags);
/**
* Decode the peripheral id using the interrpt numbers.
*
* @param blob Device tree blob
* @param node FDT I2C node to find
* @return peripheral id if ok, PERIPH_ID_NONE on error
*/
int pinmux_decode_periph_id(const void *blob, int node);
#endif #endif