* Patch by Steven Scholz, 27 Feb 2004:

- Adding get_ticks() and get_tbclk() for AT91RM9200
  - Many white space fixes in cpu/at91rm9200/interrupts.c

* Patches by Steven Scholz, 20 Feb 2004:
  some cleanup in AT91RM9200 related code
This commit is contained in:
wdenk 2004-03-15 09:00:01 +00:00
parent 42dfe7a184
commit d9df1f4e66
6 changed files with 204 additions and 170 deletions

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@ -2,6 +2,13 @@
Changes for U-Boot 1.0.2: Changes for U-Boot 1.0.2:
====================================================================== ======================================================================
* Patch by Steven Scholz, 27 Feb 2004:
- Adding get_ticks() and get_tbclk() for AT91RM9200
- Many white space fixes in cpu/at91rm9200/interrupts.c
* Patches by Steven Scholz, 20 Feb 2004:
some cleanup in AT91RM9200 related code
* Patches by Travis Sawyer, 12 Mar 2004: * Patches by Travis Sawyer, 12 Mar 2004:
- Fix Gigabit Ethernet support for 440GX - Fix Gigabit Ethernet support for 440GX
- Add Gigabit Ethernet Support to MII PHY utilities - Add Gigabit Ethernet Support to MII PHY utilities

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@ -905,9 +905,6 @@ ZUMA_config: unconfig
## StrongARM Systems ## StrongARM Systems
######################################################################### #########################################################################
at91rm9200dk_config : unconfig
@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
dnp1110_config : unconfig dnp1110_config : unconfig
@./mkconfig $(@:_config=) arm sa1100 dnp1110 @./mkconfig $(@:_config=) arm sa1100 dnp1110
@ -1013,6 +1010,13 @@ ep7312_config : unconfig
modnet50_config : unconfig modnet50_config : unconfig
@./mkconfig $(@:_config=) arm arm720t modnet50 @./mkconfig $(@:_config=) arm arm720t modnet50
#########################################################################
## AT91RM9200 Systems
#########################################################################
at91rm9200dk_config : unconfig
@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
######################################################################### #########################################################################
## XScale Systems ## XScale Systems
######################################################################### #########################################################################

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@ -41,10 +41,12 @@ extern void reset_cpu(ulong addr);
#define TIMER_LOAD_VAL 0xffff #define TIMER_LOAD_VAL 0xffff
/* macro to read the 16 bit timer */ /* macro to read the 16 bit timer */
#define READ_TIMER (tmr->TC_CV) #define READ_TIMER (tmr->TC_CV & 0x0000ffff)
AT91PS_TC tmr; AT91PS_TC tmr;
#ifdef CONFIG_USE_IRQ
#error There is no IRQ support for AT91RM9200 in U-Boot yet.
#else
void enable_interrupts (void) void enable_interrupts (void)
{ {
return; return;
@ -53,6 +55,7 @@ int disable_interrupts (void)
{ {
return 0; return 0;
} }
#endif
void bad_mode (void) void bad_mode (void)
@ -64,11 +67,15 @@ void bad_mode(void)
void show_regs (struct pt_regs *regs) void show_regs (struct pt_regs *regs)
{ {
unsigned long flags; unsigned long flags;
const char *processor_modes[]= const char *processor_modes[] = {
{ "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" , "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
"UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26", "UK4_26", "UK5_26", "UK6_26", "UK7_26",
"USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" , "UK8_26", "UK9_26", "UK10_26", "UK11_26",
"UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32" "UK12_26", "UK13_26", "UK14_26", "UK15_26",
"USER_32", "FIQ_32", "IRQ_32", "SVC_32",
"UK4_32", "UK5_32", "UK6_32", "ABT_32",
"UK8_32", "UK9_32", "UK10_32", "UND_32",
"UK12_32", "UK13_32", "UK14_32", "SYS_32",
}; };
flags = condition_codes (regs); flags = condition_codes (regs);
@ -76,17 +83,13 @@ const char *processor_modes[]=
printf ("pc : [<%08lx>] lr : [<%08lx>]\n" printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
"sp : %08lx ip : %08lx fp : %08lx\n", "sp : %08lx ip : %08lx fp : %08lx\n",
instruction_pointer (regs), instruction_pointer (regs),
regs->ARM_lr, regs->ARM_sp, regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
regs->ARM_ip, regs->ARM_fp);
printf ("r10: %08lx r9 : %08lx r8 : %08lx\n", printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
regs->ARM_r10, regs->ARM_r9, regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
regs->ARM_r8);
printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
regs->ARM_r7, regs->ARM_r6, regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
regs->ARM_r5, regs->ARM_r4);
printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
regs->ARM_r3, regs->ARM_r2, regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
regs->ARM_r1, regs->ARM_r0);
printf ("Flags: %c%c%c%c", printf ("Flags: %c%c%c%c",
flags & CC_N_BIT ? 'N' : 'n', flags & CC_N_BIT ? 'N' : 'n',
flags & CC_Z_BIT ? 'Z' : 'z', flags & CC_Z_BIT ? 'Z' : 'z',
@ -169,6 +172,7 @@ int interrupt_init (void)
lastinc = TIMER_LOAD_VAL; lastinc = TIMER_LOAD_VAL;
tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN; tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
timestamp = 0; timestamp = 0;
return (0); return (0);
} }
@ -206,8 +210,8 @@ void reset_timer_masked(void)
ulong get_timer_masked (void) ulong get_timer_masked (void)
{ {
ulong now = READ_TIMER; ulong now = READ_TIMER;
if (now >= lastinc)
{ if (now >= lastinc) {
/* normal mode */ /* normal mode */
timestamp += now - lastinc; timestamp += now - lastinc;
} else { } else {
@ -229,6 +233,27 @@ void udelay_masked(unsigned long usec)
reset_timer_masked (); reset_timer_masked ();
while(get_timer_masked() < tmo); while (get_timer_masked () < tmo)
/*NOP*/; /*NOP*/;
} }
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk (void)
{
ulong tbclk;
tbclk = CFG_HZ;
return tbclk;
}

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@ -43,7 +43,7 @@ void serial_setbrg(void)
if ((baudrate = gd->bd->bi_baudrate) <= 0) if ((baudrate = gd->bd->bi_baudrate) <= 0)
baudrate = CONFIG_BAUDRATE; baudrate = CONFIG_BAUDRATE;
us->US_BRGR = 33 /* AT91C_MASTER_CLOCK / baudrate / 16 */; /* hardcode so no __divsi3 */ us->US_BRGR = CFG_AT91C_BRGR_DIVISOR; /* hardcode so no __divsi3 */
} }
int serial_init (void) int serial_init (void)
@ -55,7 +55,9 @@ int serial_init(void)
us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX; us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN; us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
us->US_MR = ( AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT ); us->US_MR =
(AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
us->US_IMR = ~0ul; us->US_IMR = ~0ul;
return (0); return (0);
} }
@ -64,16 +66,13 @@ void serial_putc(const char c)
{ {
if (c == '\n') if (c == '\n')
serial_putc ('\r'); serial_putc ('\r');
while( (us->US_CSR & AT91C_US_TXRDY) == 0 ) while ((us->US_CSR & AT91C_US_TXRDY) == 0);
;
us->US_THR = c; us->US_THR = c;
} }
void void serial_puts (const char *s)
serial_puts (const char *s)
{
while (*s)
{ {
while (*s) {
serial_putc (*s++); serial_putc (*s++);
} }
} }

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@ -28,11 +28,6 @@
#include "AT91RM9200_inc.h" #include "AT91RM9200_inc.h"
#endif #endif
/* AT91RM92000 clocks */
#define AT91_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
#define AT91_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
/* Virtual and Physical base address for system peripherals */ /* Virtual and Physical base address for system peripherals */
#define AT91_SYS_BASE 0xFFFFF000 /*4K */ #define AT91_SYS_BASE 0xFFFFF000 /*4K */

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@ -36,6 +36,8 @@
#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */ /* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
@ -50,6 +52,8 @@
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
#define CFG_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
/* /*
* Hardware drivers * Hardware drivers
*/ */