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arm/km: support the 2 PCIe fpga resets
The PCIe FPGAs now have to support 2 resets: one for the non traffic affecting part (PCIe) and one for the traffic affecting part. When the FPGA is not reconfigured, we only reset the PCIe part. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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@ -99,7 +99,7 @@ static int boco_set_bits(u8 reg, u8 flags)
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#define FPGA_INIT_B 0x10
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#define FPGA_INIT_B 0x10
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#define FPGA_DONE 0x20
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#define FPGA_DONE 0x20
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static int fpga_done()
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static int fpga_done(void)
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{
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{
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int ret = 0;
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int ret = 0;
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u8 regval;
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u8 regval;
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@ -206,25 +206,30 @@ int wait_for_fpga_config(void)
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}
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}
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#define PRST1 0x4
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#define PRST1 0x4
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#define BRIDGE_RST 0x4
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#define PCIE_RST 0x10
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#define TRAFFIC_RST 0x04
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int fpga_reset(void)
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int fpga_reset(void)
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{
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{
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int ret = 0;
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int ret = 0;
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u8 resets;
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if (!check_boco2()) {
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if (!check_boco2()) {
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/* we do not have BOCO2, this is not really used */
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/* we do not have BOCO2, this is not really used */
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return 0;
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return 0;
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}
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}
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ret = boco_clear_bits(PRST1, BRIDGE_RST);
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/* if we have skipped, we only want to reset the PCIe part */
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resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST;
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ret = boco_clear_bits(PRST1, resets);
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if (ret)
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if (ret)
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return ret;
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return ret;
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/* small delay for the pulse */
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/* small delay for the pulse */
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udelay(10);
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udelay(10);
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ret = boco_set_bits(PRST1, BRIDGE_RST);
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ret = boco_set_bits(PRST1, resets);
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if (ret)
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if (ret)
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return ret;
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return ret;
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