mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-13 14:06:07 -04:00
mpc512x: Move common files to share them by several boards
We will soon see several new MPC521x based boards added. This patch moves files that are not board specific to a common directory so they can be shared by all such ports. It also splits off common IDE code into a new file, cpu/mpc512x/ide.c . Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
This commit is contained in:
parent
03e069dc0a
commit
de26ef99bd
@ -28,10 +28,6 @@ $(shell mkdir -p $(OBJTREE)/board/freescale/common)
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LIB = $(obj)lib$(BOARD).a
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LIB = $(obj)lib$(BOARD).a
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COBJS-y := $(BOARD).o
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COBJS-y := $(BOARD).o
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COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
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COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
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COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o
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COBJS-$(CONFIG_PCI) += pci.o
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COBJS := $(COBJS-y)
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COBJS := $(COBJS-y)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -216,7 +216,7 @@ long int fixed_sdram (void)
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int misc_init_r(void)
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int misc_init_r(void)
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{
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{
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u8 tmp_val;
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u8 tmp_val;
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extern int ads5121_diu_init(void);
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extern int mpc5121_diu_init(void);
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/* Using this for DIU init before the driver in linux takes over
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/* Using this for DIU init before the driver in linux takes over
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* Enable the TFP410 Encoder (I2C address 0x38)
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* Enable the TFP410 Encoder (I2C address 0x38)
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@ -239,7 +239,7 @@ int misc_init_r(void)
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#ifdef CONFIG_FSL_DIU_FB
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#ifdef CONFIG_FSL_DIU_FB
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#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
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#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
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ads5121_diu_init();
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mpc5121_diu_init();
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#endif
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#endif
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#endif
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#endif
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@ -329,104 +329,3 @@ void ft_board_setup(void *blob, bd_t *bd)
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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}
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
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void init_ide_reset (void)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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debug ("init_ide_reset\n");
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/*
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* Clear the reset bit to reset the interface
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* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
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*/
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immr->pata.pata_ata_control = 0;
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udelay(100);
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/* Assert the reset bit to enable the interface */
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immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
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udelay(100);
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}
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void ide_set_reset (int idereset)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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debug ("ide_set_reset(%d)\n", idereset);
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if (idereset) {
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immr->pata.pata_ata_control = 0;
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udelay(100);
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} else {
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immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
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udelay(100);
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}
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}
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#define CALC_TIMING(t) (t + period - 1) / period
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int ide_preinit (void)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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long t;
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const struct {
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short t0;
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short t1;
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short t2_8;
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short t2_16;
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short t2i;
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short t4;
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short t9;
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short tA;
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} pio_specs = {
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.t0 = 600,
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.t1 = 70,
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.t2_8 = 290,
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.t2_16 = 165,
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.t2i = 0,
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.t4 = 30,
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.t9 = 20,
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.tA = 50,
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};
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union {
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u32 config;
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struct {
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u8 field1;
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u8 field2;
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u8 field3;
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u8 field4;
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}bytes;
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}cfg;
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debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
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(u32)&immr->pata);
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/* Set the reset bit to 1 to enable the interface */
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immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
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/* Init timings : we use PIO mode 0 timings */
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t = 1000000000 / gd->ips_clk; /* period in ns */
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cfg.bytes.field1 = 3;
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cfg.bytes.field2 = 3;
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cfg.bytes.field3 = (pio_specs.t1 + t) / t;
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cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
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immr->pata.pata_time1 = cfg.config;
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cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
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cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
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cfg.bytes.field3 = 1;
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cfg.bytes.field4 = (pio_specs.t4 + t) / t;
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immr->pata.pata_time2 = cfg.config;
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cfg.config = immr->pata.pata_time3;
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cfg.bytes.field1 = (pio_specs.t9 + t) / t;
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immr->pata.pata_time3 = cfg.config;
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debug ("PATA preinit complete.\n");
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return 0;
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}
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#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */
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@ -22,11 +22,18 @@
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include $(TOPDIR)/config.mk
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include $(TOPDIR)/config.mk
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$(shell mkdir -p $(OBJTREE)/board/freescale/common)
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LIB = $(obj)lib$(CPU).a
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LIB = $(obj)lib$(CPU).a
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START = start.o
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START = start.o
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COBJS-y := traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o
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COBJS-y := traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o
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COBJS-${CONFIG_FSL_DIU_FB} += diu.o
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COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_diu_fb.o
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COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_logo_bmp.o
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COBJS-${CONFIG_CMD_IDE} += ide.o
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COBJS-${CONFIG_IIM} += iim.o
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COBJS-${CONFIG_IIM} += iim.o
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COBJS-$(CONFIG_PCI) += pci.o
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COBJS := $(COBJS-y)
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COBJS := $(COBJS-y)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -1,5 +1,5 @@
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#
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#
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# (C) Copyright 2007 DENX Software Engineering
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# (C) Copyright 2007-2009 DENX Software Engineering
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#
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#
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# See file CREDITS for list of people who contributed to this
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# See file CREDITS for list of people who contributed to this
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# project.
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# project.
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@ -23,3 +23,7 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
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PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
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PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
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-ffixed-r2 -msoft-float -mcpu=603e
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-ffixed-r2 -msoft-float -mcpu=603e
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# Use default linker script.
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# A board port can override this setting in board/*/config.mk
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LDSCRIPT := $(SRCTREE)/cpu/mpc512x/u-boot.lds
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@ -27,10 +27,8 @@
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#include <command.h>
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#include <command.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#ifdef CONFIG_FSL_DIU_FB
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#include "../../board/freescale/common/pixis.h"
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#include "../../board/freescale/common/fsl_diu_fb.h"
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#include "../freescale/common/pixis.h"
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#include "../freescale/common/fsl_diu_fb.h"
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#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
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#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
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#include <devices.h>
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#include <devices.h>
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@ -81,7 +79,7 @@ char *valid_bmp(char *addr)
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return (char *)h_addr;
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return (char *)h_addr;
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}
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}
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int ads5121_diu_init(void)
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int mpc5121_diu_init(void)
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{
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{
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unsigned int pixel_format;
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unsigned int pixel_format;
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char *bmp = NULL;
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char *bmp = NULL;
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@ -91,7 +89,7 @@ int ads5121_diu_init(void)
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yres = 768;
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yres = 768;
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pixel_format = 0x88883316;
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pixel_format = 0x88883316;
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debug("ads5121_diu_init\n");
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debug("mpc5121_diu_init\n");
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bmp_env = getenv("diu_bmp_addr");
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bmp_env = getenv("diu_bmp_addr");
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if (bmp_env) {
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if (bmp_env) {
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bmp = valid_bmp(bmp_env);
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bmp = valid_bmp(bmp_env);
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@ -101,7 +99,7 @@ int ads5121_diu_init(void)
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return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp);
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return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp);
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}
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}
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int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
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int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
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int flag, int argc, char *argv[])
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int flag, int argc, char *argv[])
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{
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{
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unsigned int addr;
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unsigned int addr;
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@ -116,7 +114,7 @@ int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
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fsl_diu_clear_screen();
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fsl_diu_clear_screen();
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drv_video_init();
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drv_video_init();
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#else
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#else
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return ads5121_diu_init();
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return mpc5121_diu_init();
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#endif
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#endif
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} else {
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} else {
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addr = simple_strtoul(argv[1], NULL, 16);
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addr = simple_strtoul(argv[1], NULL, 16);
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@ -128,7 +126,7 @@ int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
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}
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}
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U_BOOT_CMD(
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U_BOOT_CMD(
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diufb, CONFIG_SYS_MAXARGS, 1, ads5121diu_init_show_bmp,
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diufb, CONFIG_SYS_MAXARGS, 1, mpc5121diu_init_show_bmp,
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"Init or Display BMP file",
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"Init or Display BMP file",
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"init\n - initialize DIU\n"
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"init\n - initialize DIU\n"
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"addr\n - display bmp at address 'addr'"
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"addr\n - display bmp at address 'addr'"
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@ -146,7 +144,7 @@ void *video_hw_init(void)
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GraphicDevice *pGD = (GraphicDevice *) &ctfb;
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GraphicDevice *pGD = (GraphicDevice *) &ctfb;
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struct fb_info *info;
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struct fb_info *info;
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if (ads5121_diu_init() < 0)
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if (mpc5121_diu_init() < 0)
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return;
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return;
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/* fill in Graphic device struct */
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/* fill in Graphic device struct */
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@ -189,5 +187,3 @@ void video_set_lut
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}
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}
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#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
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#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
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#endif /* CONFIG_FSL_DIU_FB */
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128
cpu/mpc512x/ide.c
Normal file
128
cpu/mpc512x/ide.c
Normal file
@ -0,0 +1,128 @@
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/*
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* (C) Copyright 2007-2009 DENX Software Engineering
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_IDE_RESET)
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void init_ide_reset (void)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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debug ("init_ide_reset\n");
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/*
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* Clear the reset bit to reset the interface
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* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
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*/
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immr->pata.pata_ata_control = 0;
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udelay(100);
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/* Assert the reset bit to enable the interface */
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immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
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udelay(100);
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}
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void ide_set_reset (int idereset)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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debug ("ide_set_reset(%d)\n", idereset);
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if (idereset) {
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immr->pata.pata_ata_control = 0;
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udelay(100);
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} else {
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immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
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udelay(100);
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}
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}
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#define CALC_TIMING(t) (t + period - 1) / period
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int ide_preinit (void)
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{
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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long t;
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const struct {
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short t0;
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short t1;
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short t2_8;
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short t2_16;
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short t2i;
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short t4;
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short t9;
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short tA;
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} pio_specs = {
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.t0 = 600,
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.t1 = 70,
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.t2_8 = 290,
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.t2_16 = 165,
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.t2i = 0,
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.t4 = 30,
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.t9 = 20,
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.tA = 50,
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};
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union {
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u32 config;
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||||||
|
struct {
|
||||||
|
u8 field1;
|
||||||
|
u8 field2;
|
||||||
|
u8 field3;
|
||||||
|
u8 field4;
|
||||||
|
}bytes;
|
||||||
|
}cfg;
|
||||||
|
|
||||||
|
debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
|
||||||
|
(u32)&immr->pata);
|
||||||
|
|
||||||
|
/* Set the reset bit to 1 to enable the interface */
|
||||||
|
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
|
||||||
|
|
||||||
|
/* Init timings : we use PIO mode 0 timings */
|
||||||
|
t = 1000000000 / gd->ips_clk; /* period in ns */
|
||||||
|
cfg.bytes.field1 = 3;
|
||||||
|
cfg.bytes.field2 = 3;
|
||||||
|
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
|
||||||
|
cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
|
||||||
|
|
||||||
|
immr->pata.pata_time1 = cfg.config;
|
||||||
|
|
||||||
|
cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
|
||||||
|
cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
|
||||||
|
cfg.bytes.field3 = 1;
|
||||||
|
cfg.bytes.field4 = (pio_specs.t4 + t) / t;
|
||||||
|
|
||||||
|
immr->pata.pata_time2 = cfg.config;
|
||||||
|
|
||||||
|
cfg.config = immr->pata.pata_time3;
|
||||||
|
cfg.bytes.field1 = (pio_specs.t9 + t) / t;
|
||||||
|
|
||||||
|
immr->pata.pata_time3 = cfg.config;
|
||||||
|
debug ("PATA preinit complete.\n");
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* defined(CONFIG_IDE_RESET) */
|
Loading…
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Reference in New Issue
Block a user