mirror of
https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git
synced 2025-09-12 13:35:21 -04:00
x86: Remove unused bios/pci code
Graeme Russ pointed out that this code is no longer used. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
This commit is contained in:
Simon Glass
parent
bbd0f7e3ba
commit
dfdedd9c2e
@ -30,8 +30,4 @@
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const struct pci_device_id _table[]
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const struct pci_device_id _table[]
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void pci_setup_type1(struct pci_controller *hose);
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void pci_setup_type1(struct pci_controller *hose);
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int pci_enable_legacy_video_ports(struct pci_controller* hose);
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int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
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void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
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u32 pci_get_rom_window(struct pci_controller* hose, int size);
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#endif
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#endif
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@ -37,7 +37,6 @@ COBJS-y += init_wrappers.o
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COBJS-y += interrupts.o
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COBJS-y += interrupts.o
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COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
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COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
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COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
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COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
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COBJS-$(CONFIG_PCI) += pci.o
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COBJS-$(CONFIG_PCI) += pci_type1.o
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COBJS-$(CONFIG_PCI) += pci_type1.o
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COBJS-y += relocate.o
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COBJS-y += relocate.o
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COBJS-y += physmem.o
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COBJS-y += physmem.o
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@ -1,170 +0,0 @@
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _BIOS_H_
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#define _BIOS_H_
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#define OFFS_ES 0 /* 16bit */
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#define OFFS_GS 2 /* 16bit */
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#define OFFS_DS 4 /* 16bit */
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#define OFFS_EDI 6 /* 32bit */
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#define OFFS_DI 6 /* low 16 bits of EDI */
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#define OFFS_ESI 10 /* 32bit */
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#define OFFS_SI 10 /* low 16 bits of ESI */
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#define OFFS_EBP 14 /* 32bit */
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#define OFFS_BP 14 /* low 16 bits of EBP */
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#define OFFS_ESP 18 /* 32bit */
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#define OFFS_SP 18 /* low 16 bits of ESP */
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#define OFFS_EBX 22 /* 32bit */
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#define OFFS_BX 22 /* low 16 bits of EBX */
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#define OFFS_BL 22 /* low 8 bits of BX */
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#define OFFS_BH 23 /* high 8 bits of BX */
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#define OFFS_EDX 26 /* 32bit */
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#define OFFS_DX 26 /* low 16 bits of EBX */
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#define OFFS_DL 26 /* low 8 bits of BX */
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#define OFFS_DH 27 /* high 8 bits of BX */
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#define OFFS_ECX 30 /* 32bit */
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#define OFFS_CX 30 /* low 16 bits of EBX */
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#define OFFS_CL 30 /* low 8 bits of BX */
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#define OFFS_CH 31 /* high 8 bits of BX */
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#define OFFS_EAX 34 /* 32bit */
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#define OFFS_AX 34 /* low 16 bits of EBX */
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#define OFFS_AL 34 /* low 8 bits of BX */
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#define OFFS_AH 35 /* high 8 bits of BX */
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#define OFFS_VECTOR 38 /* 16bit */
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#define OFFS_IP 40 /* 16bit */
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#define OFFS_CS 42 /* 16bit */
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#define OFFS_FLAGS 44 /* 16bit */
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/* stack at 0x40:0x800 -> 0x800 */
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#define SEGMENT 0x40
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#define STACK 0x800
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/*
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* save general registers
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* save some segments
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* save callers stack segment
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* setup BIOS segments
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* setup BIOS stackpointer
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*/
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#define MAKE_BIOS_STACK \
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pushal; \
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pushw %ds; \
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pushw %gs; \
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pushw %es; \
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pushw %ss; \
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popw %gs; \
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movw $SEGMENT, %ax; \
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movw %ax, %ds; \
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movw %ax, %es; \
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movw %ax, %ss; \
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movw %sp, %bp; \
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movw $STACK, %sp
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/*
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* restore callers stack segment
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* restore some segments
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* restore general registers
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*/
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#define RESTORE_CALLERS_STACK \
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pushw %gs; \
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popw %ss; \
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movw %bp, %sp; \
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popw %es; \
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popw %gs; \
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popw %ds; \
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popal
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#ifndef __ASSEMBLY__
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#define BIOS_DATA ((char *)0x400)
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#define BIOS_DATA_SIZE 256
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#define BIOS_BASE ((char *)0xf0000)
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#define BIOS_CS 0xf000
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extern ulong __bios_start;
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extern ulong __bios_size;
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/* these are defined in a 16bit segment and needs
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* to be accessed with the RELOC_16_xxxx() macros below
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*/
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extern u16 ram_in_64kb_chunks;
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extern u16 bios_equipment;
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extern u8 pci_last_bus;
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extern void *rm_int00;
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extern void *rm_int01;
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extern void *rm_int02;
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extern void *rm_int03;
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extern void *rm_int04;
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extern void *rm_int05;
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extern void *rm_int06;
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extern void *rm_int07;
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extern void *rm_int08;
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extern void *rm_int09;
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extern void *rm_int0a;
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extern void *rm_int0b;
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extern void *rm_int0c;
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extern void *rm_int0d;
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extern void *rm_int0e;
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extern void *rm_int0f;
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extern void *rm_int10;
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extern void *rm_int11;
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extern void *rm_int12;
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extern void *rm_int13;
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extern void *rm_int14;
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extern void *rm_int15;
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extern void *rm_int16;
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extern void *rm_int17;
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extern void *rm_int18;
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extern void *rm_int19;
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extern void *rm_int1a;
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extern void *rm_int1b;
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extern void *rm_int1c;
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extern void *rm_int1d;
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extern void *rm_int1e;
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extern void *rm_int1f;
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extern void *rm_def_int;
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#define RELOC_16_LONG(seg, off) (*(u32 *)(seg << 4 | (u32)&off))
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#define RELOC_16_WORD(seg, off) (*(u16 *)(seg << 4 | (u32)&off))
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#define RELOC_16_BYTE(seg, off) (*(u8 *)(seg << 4 | (u32)&off))
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#ifdef PCI_BIOS_DEBUG
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extern u32 num_pci_bios_present;
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extern u32 num_pci_bios_find_device;
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extern u32 num_pci_bios_find_class;
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extern u32 num_pci_bios_generate_special_cycle;
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extern u32 num_pci_bios_read_cfg_byte;
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extern u32 num_pci_bios_read_cfg_word;
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extern u32 num_pci_bios_read_cfg_dword;
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extern u32 num_pci_bios_write_cfg_byte;
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extern u32 num_pci_bios_write_cfg_word;
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extern u32 num_pci_bios_write_cfg_dword;
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extern u32 num_pci_bios_get_irq_routing;
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extern u32 num_pci_bios_set_irq;
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extern u32 num_pci_bios_unknown_function;
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#endif
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#endif
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#endif
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@ -1,188 +0,0 @@
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#undef PCI_ROM_SCAN_VERBOSE
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int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
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{
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struct pci_controller *hose;
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int res = -1;
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int i;
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u32 rom_addr;
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u32 addr_reg;
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u32 size;
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u16 vendor;
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u16 device;
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u32 class_code;
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u32 pci_data;
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hose = pci_bus_to_hose(PCI_BUS(dev));
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debug("pci_shadow_rom() asked to shadow device %x to %x\n",
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dev, (u32)dest);
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pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
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pci_read_config_word(dev, PCI_DEVICE_ID, &device);
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pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
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class_code &= 0xffffff00;
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class_code >>= 8;
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debug("PCI Header Vendor %04x device %04x class %06x\n",
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vendor, device, class_code);
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/* Enable the rom addess decoder */
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pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
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pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
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if (!addr_reg) {
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/* register unimplemented */
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printf("pci_chadow_rom: device do not seem to have a rom\n");
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return -1;
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}
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size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1;
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debug("ROM is %d bytes\n", size);
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rom_addr = pci_get_rom_window(hose, size);
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debug("ROM mapped at %x\n", rom_addr);
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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pci_phys_to_mem(dev, rom_addr)
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|PCI_ROM_ADDRESS_ENABLE);
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for (i = rom_addr; i < rom_addr + size; i += 512) {
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if (readw(i) == 0xaa55) {
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("ROM signature found\n");
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#endif
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pci_data = readw(0x18 + i);
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pci_data += i;
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if (0 == memcmp((void *)pci_data, "PCIR", 4)) {
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("Fount PCI rom image at offset %d\n",
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i - rom_addr);
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printf("Vendor %04x device %04x class %06x\n",
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readw(pci_data + 4), readw(pci_data + 6),
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readl(pci_data + 0x0d) & 0xffffff);
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printf("%s\n",
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(readw(pci_data + 0x15) & 0x80) ?
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"Last image" : "More images follow");
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switch (readb(pci_data + 0x14)) {
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case 0:
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printf("X86 code\n");
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break;
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case 1:
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printf("Openfirmware code\n");
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break;
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case 2:
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printf("PARISC code\n");
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break;
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}
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printf("Image size %d\n",
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readw(pci_data + 0x10) * 512);
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#endif
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/*
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* FixMe: I think we should compare the class
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* code bytes as well but I have no reference
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* on the exact order of these bytes in the PCI
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* ROM header
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*/
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if (readw(pci_data + 4) == vendor &&
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readw(pci_data + 6) == device &&
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readb(pci_data + 0x14) == 0) {
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("Suitable ROM image found\n");
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#endif
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memmove(dest, (void *)rom_addr,
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readw(pci_data + 0x10) * 512);
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res = 0;
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break;
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}
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if (readw(pci_data + 0x15) & 0x80)
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break;
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}
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}
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}
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#ifdef PCI_ROM_SCAN_VERBOSE
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if (res)
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printf("No suitable image found\n");
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#endif
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/* disable PAR register and PCI device ROM address devocer */
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pci_remove_rom_window(hose, rom_addr);
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pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
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return res;
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}
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#ifdef PCI_BIOS_DEBUG
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void print_bios_bios_stat(void)
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{
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printf("16 bit functions:\n");
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printf("pci_bios_present: %d\n",
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RELOC_16_LONG(0xf000, num_pci_bios_present));
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printf("pci_bios_find_device: %d\n",
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RELOC_16_LONG(0xf000, num_pci_bios_find_device));
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printf("pci_bios_find_class: %d\n",
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RELOC_16_LONG(0xf000, num_pci_bios_find_class));
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printf("pci_bios_generate_special_cycle: %d\n",
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RELOC_16_LONG(0xf000,
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num_pci_bios_generate_special_cycle));
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printf("pci_bios_read_cfg_byte: %d\n",
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RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte));
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printf("pci_bios_read_cfg_word: %d\n",
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||||||
RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word));
|
|
||||||
printf("pci_bios_read_cfg_dword: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword));
|
|
||||||
printf("pci_bios_write_cfg_byte: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte));
|
|
||||||
printf("pci_bios_write_cfg_word: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word));
|
|
||||||
printf("pci_bios_write_cfg_dword: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword));
|
|
||||||
printf("pci_bios_get_irq_routing: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing));
|
|
||||||
printf("pci_bios_set_irq: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_set_irq));
|
|
||||||
printf("pci_bios_unknown_function: %d\n",
|
|
||||||
RELOC_16_LONG(0xf000, num_pci_bios_unknown_function));
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
Loading…
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Reference in New Issue
Block a user