From e4fb6116495eafbeee5ea8ff7ea245eb5e96d012 Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:35 +0000 Subject: [PATCH 01/13] x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ Signed-off-by: Simon Glass Acked-by: Marek Vasut --- arch/x86/cpu/cpu.c | 2 +- arch/x86/include/asm/global_data.h | 8 +++++--- arch/x86/lib/init_helpers.c | 2 +- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index e9bb0d770..67de6bcb3 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -92,7 +92,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries) void init_gd(gd_t *id, u64 *gdt_addr) { - id->gd_addr = (ulong)id; + id->gd_addr = id; setup_gdt(id, gdt_addr); } diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index bce999f41..13a3ce8fb 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -33,9 +33,11 @@ #ifndef __ASSEMBLY__ -typedef struct global_data { +typedef struct global_data gd_t; + +struct global_data { /* NOTE: gd_addr MUST be first member of struct global_data! */ - unsigned long gd_addr; /* Location of Global Data */ + gd_t *gd_addr; /* Location of Global Data */ bd_t *bd; unsigned long flags; unsigned int baudrate; @@ -57,7 +59,7 @@ typedef struct global_data { unsigned long reset_status; /* reset status register at boot */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ -} gd_t; +}; static inline gd_t *get_fs_gd_ptr(void) { diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 9ec34ff99..2f718d7c4 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -126,7 +126,7 @@ int copy_gd_to_ram_f_r(void) * in-RAM copy of Global Data (calculate_relocation_address() * has already calculated the in-RAM location of the GDT) */ - ram_gd->gd_addr = (ulong)ram_gd; + ram_gd->gd_addr = ram_gd; init_gd(ram_gd, (u64 *)gd->gdt_addr); return 0; From 8d61625d6a73307857f80002949583105545dbbc Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:36 +0000 Subject: [PATCH 02/13] x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ Signed-off-by: Simon Glass --- arch/x86/cpu/cpu.c | 6 --- arch/x86/cpu/start.S | 67 ++++++++++++++++++++++++++--- arch/x86/include/asm/global_data.h | 1 - arch/x86/include/asm/init_helpers.h | 1 - arch/x86/include/asm/processor.h | 1 + arch/x86/lib/board.c | 2 +- arch/x86/lib/init_helpers.c | 37 +--------------- include/configs/coreboot.h | 5 +-- include/configs/eNET.h | 6 --- 9 files changed, 65 insertions(+), 61 deletions(-) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 67de6bcb3..9c2db9f21 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -90,12 +90,6 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries) asm volatile("lgdtl %0\n" : : "m" (gdt)); } -void init_gd(gd_t *id, u64 *gdt_addr) -{ - id->gd_addr = id; - setup_gdt(id, gdt_addr); -} - void setup_gdt(gd_t *id, u64 *gdt_addr) { /* CS: code, read/execute, 4 GB, base 0 */ diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index ee0dabe4b..ec12e8044 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -83,13 +83,33 @@ car_init_ret: * or fully initialised SDRAM - we really don't care which) * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack */ - movl $CONFIG_SYS_INIT_SP_ADDR, %esp - /* Initialise the Global Data Pointer */ - movl $CONFIG_SYS_INIT_GD_ADDR, %eax - movl %eax, %edx - addl $GENERATED_GBL_DATA_SIZE, %edx - call init_gd; + /* Stack grows down from top of CAR */ + movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE), %esp + + /* Reserve space on stack for global data */ + subl $GENERATED_GBL_DATA_SIZE, %esp + + /* Align global data to 16-byte boundary */ + andl $0xfffffff0, %esp + + /* Setup first parameter to setup_gdt */ + movl %esp, %eax + + /* Reserve space for global descriptor table */ + subl $X86_GDT_SIZE, %esp + + /* Align temporary global descriptor table to 16-byte boundary */ + andl $0xfffffff0, %esp + + /* Set second parameter to setup_gdt */ + movl %esp, %edx + + /* gd->gd_addr = gd (Required to allow gd->xyz to work) */ + movl %eax, (%eax) + + /* Setup global descriptor table so gd->xyz works */ + call setup_gdt /* Set parameter to board_init_f() to boot flags */ xorl %eax, %eax @@ -113,9 +133,42 @@ board_init_f_r_trampoline: * %eax = Address of top of new stack */ - /* Setup stack in RAM */ + /* Stack grows down from top of SDRAM */ movl %eax, %esp + /* Reserve space on stack for global data */ + subl $GENERATED_GBL_DATA_SIZE, %esp + + /* Align global data to 16-byte boundary */ + andl $0xfffffff0, %esp + + /* Setup first parameter to memcpy (and setup_gdt) */ + movl %esp, %eax + + /* Setup second parameter to memcpy */ + fs movl 0, %edx + + /* Set third parameter to memcpy */ + movl $GENERATED_GBL_DATA_SIZE, %ecx + + /* Copy global data from CAR to SDRAM stack */ + call memcpy + + /* Reserve space for global descriptor table */ + subl $X86_GDT_SIZE, %esp + + /* Align global descriptor table to 16-byte boundary */ + andl $0xfffffff0, %esp + + /* Set second parameter to setup_gdt */ + movl %esp, %edx + + /* gd->gd_addr = gd (Required to allow gd->xyz to work) */ + movl %eax, (%eax) + + /* Setup global descriptor table so gd->xyz works */ + call setup_gdt + /* Re-enter U-Boot by calling board_init_f_r */ call board_init_f_r diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 13a3ce8fb..59c2a9095 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -54,7 +54,6 @@ struct global_data { unsigned long relocaddr; /* Start address of U-Boot in RAM */ unsigned long start_addr_sp; /* start_addr_stackpointer */ unsigned long gdt_addr; /* Location of GDT */ - unsigned long new_gd_addr; /* New location of Global Data */ phys_size_t ram_size; /* RAM size */ unsigned long reset_status; /* reset status register at boot */ void **jt; /* jump table */ diff --git a/arch/x86/include/asm/init_helpers.h b/arch/x86/include/asm/init_helpers.h index 8afb44329..ade694fba 100644 --- a/arch/x86/include/asm/init_helpers.h +++ b/arch/x86/include/asm/init_helpers.h @@ -29,7 +29,6 @@ int display_dram_config(void); int init_baudrate_f(void); int calculate_relocation_address(void); -int copy_gd_to_ram_f_r(void); int init_cache_f_r(void); int set_reloc_flag_r(void); diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 6eb518063..17f27cbb6 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -41,6 +41,7 @@ enum { #else /* NOTE: If the above enum is modified, this define must be checked */ #define X86_GDT_ENTRY_32BIT_DS 3 +#define X86_GDT_NUM_ENTRIES 7 #endif #define X86_GDT_SIZE (X86_GDT_NUM_ENTRIES * X86_GDT_ENTRY_SIZE) diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index e5caf1356..a13f5c0e1 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -121,7 +122,6 @@ init_fnc_t *init_sequence_f[] = { * initialise the CPU caches (to speed up the relocation process) */ init_fnc_t *init_sequence_f_r[] = { - copy_gd_to_ram_f_r, init_cache_f_r, copy_uboot_to_ram, clear_bss, diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 2f718d7c4..87c7263fc 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -83,18 +83,8 @@ int calculate_relocation_address(void) * requirements */ - /* Global Data is at top of available memory */ + /* Stack is at top of available memory */ dest_addr = gd->ram_size; - dest_addr -= GENERATED_GBL_DATA_SIZE; - dest_addr &= ~15; - gd->new_gd_addr = dest_addr; - - /* GDT is below Global Data */ - dest_addr -= X86_GDT_SIZE; - dest_addr &= ~15; - gd->gdt_addr = dest_addr; - - /* Stack is below GDT */ gd->start_addr_sp = dest_addr; /* U-Boot is below the stack */ @@ -107,31 +97,6 @@ int calculate_relocation_address(void) return 0; } -int copy_gd_to_ram_f_r(void) -{ - gd_t *ram_gd; - - /* - * Global data is still in temporary memory (the CPU cache). - * calculate_relocation_address() has set gd->new_gd_addr to - * where the global data lives in RAM but getting it there - * safely is a bit tricky due to the 'F-Segment Hack' that - * we need to use for x86 - */ - ram_gd = (gd_t *)gd->new_gd_addr; - memcpy((void *)ram_gd, gd, sizeof(gd_t)); - - /* - * Reload the Global Descriptor Table so FS points to the - * in-RAM copy of Global Data (calculate_relocation_address() - * has already calculated the in-RAM location of the GDT) - */ - ram_gd->gd_addr = ram_gd; - init_gd(ram_gd, (u64 *)gd->gdt_addr); - - return 0; -} - int init_cache_f_r(void) { /* Initialise the CPU cache(s) */ diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index cc95e2be9..8d3c21f05 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -210,12 +210,11 @@ * (128kB + Environment Sector Size) malloc pool */ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024) +#define CONFIG_SYS_CAR_ADDR 0x19200000 +#define CONFIG_SYS_CAR_SIZE (16 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024) -/* Address of temporary Global Data */ -#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024) /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 4b1c21904..28cf95b77 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -168,16 +168,10 @@ #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_CAR_ADDR 0x19200000 #define CONFIG_SYS_CAR_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_CAR_ADDR + \ - CONFIG_SYS_CAR_SIZE) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + \ 128*1024) -/* Address of temporary Global Data */ -#define CONFIG_SYS_INIT_GD_ADDR CONFIG_SYS_CAR_ADDR - - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE From c73c6de60c94b444cd717ffd27041a49fbbc4849 Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:37 +0000 Subject: [PATCH 03/13] x86: Remove duplicate PCI init Signed-off-by: Graeme Russ Signed-off-by: Simon Glass --- arch/x86/lib/board.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index a13f5c0e1..c7d89604c 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -164,9 +164,6 @@ init_fnc_t *init_sequence_r[] = { #ifdef CONFIG_MISC_INIT_R misc_init_r, #endif -#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_CMD_IDE) - pci_init_r, -#endif #if defined(CONFIG_CMD_KGDB) kgdb_init_r, #endif From 8abebe3eadb35222a1147078da4010b4cbfe5858 Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:38 +0000 Subject: [PATCH 04/13] x86: Add ilog2 to bitops ilog2 is required by AHCI driver Signed-off-by: Graeme Russ Signed-off-by: Simon Glass --- arch/x86/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index c7a38f237..5a7e4cba2 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -351,6 +351,11 @@ static __inline__ int ffs(int x) } #define PLATFORM_FFS +static inline int __ilog2(unsigned int x) +{ + return generic_fls(x) - 1; +} + /** * hweightN - returns the hamming weight of a N-bit word * @x: the word to weigh From 8a487a4417221412d1cd23d4e08253fc9413be51 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 10 Oct 2012 13:12:53 +0000 Subject: [PATCH 05/13] x86: Add initial memory barrier macros These are available on other architectures, so add them on x86. Signed-off-by: Simon Glass --- arch/x86/include/asm/io.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 9b757d489..b12bdd8e2 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -234,4 +234,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr) return (phys_addr_t)(vaddr); } +/* + * TODO: The kernel offers some more advanced versions of barriers, it might + * have some advantages to use them instead of the simple one here. + */ +#define dmb() __asm__ __volatile__ ("" : : : "memory") +#define __iormb() dmb() +#define __iowmb() dmb() + #endif From b16f521a5e87208cebbd17964452e11704416c3f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 27 Nov 2012 21:08:06 +0000 Subject: [PATCH 06/13] x86: Allow excluding reset vector code from u-boot When running from coreboot we don't want this code. This version works by ifdef-ing out all of the code that would go into those sections and all the code that refers to it. The sections are then empty, and the linker will either leave them empty for the loader to ignore or remove them entirely. Signed-off-by: Gabe Black Signed-off-by: Simon Glass --- Makefile | 6 +++--- README | 4 ++++ arch/x86/cpu/Makefile | 5 +++-- arch/x86/cpu/u-boot.lds | 3 +++ 4 files changed, 13 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index c01afc9f6..19ac8f5b8 100644 --- a/Makefile +++ b/Makefile @@ -231,8 +231,8 @@ endif OBJS = $(CPUDIR)/start.o ifeq ($(CPU),x86) -OBJS += $(CPUDIR)/start16.o -OBJS += $(CPUDIR)/resetvec.o +RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/start16.o +RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += $(CPUDIR)/resetvec.o endif ifeq ($(CPU),ppc4xx) OBJS += $(CPUDIR)/resetvec.o @@ -241,7 +241,7 @@ ifeq ($(CPU),mpc85xx) OBJS += $(CPUDIR)/resetvec.o endif -OBJS := $(addprefix $(obj),$(OBJS)) +OBJS := $(addprefix $(obj),$(OBJS) $(RESET_OBJS-)) HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n) diff --git a/README b/README index 67ff03a12..b9a36856d 100644 --- a/README +++ b/README @@ -3664,6 +3664,10 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size. +- CONFIG_X86_NO_RESET_VECTOR + If defined, the x86 reset vector code is excluded. You will need + to do this when U-Boot is running from Coreboot. + Freescale QE/FMAN Firmware Support: ----------------------------------- diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 7f1fc188c..be27dd9e2 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -28,12 +28,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).o -START = start.o start16.o resetvec.o +START-y = start.o +RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += resetvec.o start16.o COBJS = interrupts.o cpu.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -START := $(addprefix $(obj),$(START)) +START := $(addprefix $(obj),$(START-y) $(RESET_OBJS-)) all: $(obj).depend $(START) $(LIB) diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index a1ecefafc..0c6f0e31d 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -86,6 +86,8 @@ SECTIONS __bios_start = LOADADDR(.bios); __bios_size = SIZEOF(.bios); +#ifndef CONFIG_X86_NO_RESET_VECTOR + /* * The following expressions place the 16-bit Real-Mode code and * Reset Vector at the end of the Flash ROM @@ -95,4 +97,5 @@ SECTIONS . = RESET_VEC_LOC; .resetvec : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE + RESET_VEC_LOC)) { KEEP(*(.resetvec)); } +#endif } From c953fbee540c4c5a13f747a92daa59c24a9aaacf Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 10 Oct 2012 13:12:55 +0000 Subject: [PATCH 07/13] x86: Add some missing includes I suspect these includes were usually available because something else included them earlier or because they were brought in transitively. Change-Id: I6aae2ac94dc792eac6febb4345e8125f69f70988 Signed-off-by: Gabe Black Signed-off-by: Simon Glass --- arch/x86/include/asm/global_data.h | 2 ++ arch/x86/include/asm/u-boot.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 59c2a9095..b8961baae 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -33,6 +33,8 @@ #ifndef __ASSEMBLY__ +#include + typedef struct global_data gd_t; struct global_data { diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h index da667c50a..2f45c7b3d 100644 --- a/arch/x86/include/asm/u-boot.h +++ b/arch/x86/include/asm/u-boot.h @@ -36,6 +36,9 @@ #ifndef _U_BOOT_H_ #define _U_BOOT_H_ 1 +#include +#include + typedef struct bd_info { unsigned long bi_memstart; /* start of DRAM memory */ phys_size_t bi_memsize; /* size of DRAM memory in bytes */ From badcb343d7844e81be92ba9a7a02f22159591650 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 10 Oct 2012 13:12:56 +0000 Subject: [PATCH 08/13] x86: coreboot: Move non-board specific files to coreboot arch directory coreboot.c and coreboot_pci.c don't contain board specific but only coreboot specific code. Hence move it to the coreboot directory in arch/x86/cpu (which should probably be moved out of cpu/ in another commit) Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- arch/x86/cpu/coreboot/Makefile | 2 ++ {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c | 0 .../coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c | 0 board/chromebook-x86/coreboot/Makefile | 2 -- 4 files changed, 2 insertions(+), 2 deletions(-) rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%) rename board/chromebook-x86/coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c (100%) diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile index 13f5f8a2f..fbf5a0038 100644 --- a/arch/x86/cpu/coreboot/Makefile +++ b/arch/x86/cpu/coreboot/Makefile @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk LIB := $(obj)lib$(SOC).o +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o COBJS-$(CONFIG_SYS_COREBOOT) += tables.o COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o +COBJS-$(CONFIG_PCI) += pci.o SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o diff --git a/board/chromebook-x86/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c similarity index 100% rename from board/chromebook-x86/coreboot/coreboot.c rename to arch/x86/cpu/coreboot/coreboot.c diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c b/arch/x86/cpu/coreboot/pci.c similarity index 100% rename from board/chromebook-x86/coreboot/coreboot_pci.c rename to arch/x86/cpu/coreboot/pci.c diff --git a/board/chromebook-x86/coreboot/Makefile b/board/chromebook-x86/coreboot/Makefile index cfcc0dfbe..2bddf04b6 100644 --- a/board/chromebook-x86/coreboot/Makefile +++ b/board/chromebook-x86/coreboot/Makefile @@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS-y += coreboot.o -COBJS-$(CONFIG_PCI) += coreboot_pci.o SOBJS-y += coreboot_start16.o SOBJS-y += coreboot_start.o From 452f50f7cff5d77db79ee3b11b4b3e19b166e6b0 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 10 Oct 2012 13:12:57 +0000 Subject: [PATCH 09/13] x86: coreboot: Tell u-boot about PCI bus 0 when initializing U-boot needs a host controller or "hose" to interact with the PCI busses behind them. This change installs a host controller during initialization of the coreboot "board" which implements some of X86's basic PCI semantics. This relies on some existing generic code, but also duplicates a little bit of code from the sc520 implementation. Ideally we'd eliminate that duplication at some point. It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's generic PCI configuration code what to do if it encounters a bridge, specifically to scan the bus on the other side of it. Signed-off-by: Gabe Black Signed-off-by: Simon Glass Acked-by: Graeme Russ --- arch/x86/cpu/coreboot/pci.c | 15 +++++++++++++++ arch/x86/include/asm/pci.h | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c index 732ca3cea..0ddc97501 100644 --- a/arch/x86/cpu/coreboot/pci.c +++ b/arch/x86/cpu/coreboot/pci.c @@ -25,6 +25,21 @@ * MA 02111-1307 USA */ +#include +#include +#include + +static struct pci_controller coreboot_hose; + void pci_init_board(void) { + coreboot_hose.first_busno = 0; + coreboot_hose.last_busno = 0xff; + coreboot_hose.region_count = 0; + + pci_setup_type1(&coreboot_hose); + + pci_register_hose(&coreboot_hose); + + coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose); } diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 37cc7e3a0..6d68ab6c9 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -24,7 +24,7 @@ */ #ifndef _PCI_I386_H_ -#define _PCI_I386_H_ 1 +#define _PCI_I386_H_ #define DEFINE_PCI_DEVICE_TABLE(_table) \ const struct pci_device_id _table[] From 422322f2889a62ca50521869bea0d381bc648d00 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Wed, 10 Oct 2012 13:12:58 +0000 Subject: [PATCH 10/13] x86: coreboot: Modify u-boot code to allow building coreboot payload This prevents the preprocessor from complaining when processing variadic macros Signed-off-by: Vadim Bendebury Signed-off-by: Simon Glass Acked-by: Graeme Russ --- board/chromebook-x86/coreboot/config.mk | 37 +++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 board/chromebook-x86/coreboot/config.mk diff --git a/board/chromebook-x86/coreboot/config.mk b/board/chromebook-x86/coreboot/config.mk new file mode 100644 index 000000000..f720851aa --- /dev/null +++ b/board/chromebook-x86/coreboot/config.mk @@ -0,0 +1,37 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above +# copyright notice, this list of conditions and the following disclaimer +# in the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Google Inc. nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Alternatively, this software may be distributed under the terms of the +# GNU General Public License ("GPL") version 2 as published by the Free +# Software Foundation. +# + +HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros From 82e73f0e3da3ae8b1a6a14dafa8af38d140fb1b2 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 10 Oct 2012 13:12:59 +0000 Subject: [PATCH 11/13] x86: coreboot: Implement recursively scanning PCI busses A hook is installed to configure PCI bus bridges as they encountered by u-boot. The hook extracts the secondary bus number from the bridge's config space and then recursively scans that bus. On Coreboot, the PCI bus address space has identity mapping with the physical address space, so declare it as such to ensure that the "pci_map_bar" function used by some PCI drivers is behaving properly. This fixes the EHCI PCI driver initialization on Stumpy. This was tested as follows: Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on bus 1, and empty busses 2 through 5. This matches the bridges reported on bus 0 and the PCI configuration output from coreboot. Signed-off-by: Gabe Black Signed-off-by: Vincent Palatin Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- arch/x86/cpu/coreboot/pci.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c index 0ddc97501..8f9416748 100644 --- a/arch/x86/cpu/coreboot/pci.c +++ b/arch/x86/cpu/coreboot/pci.c @@ -31,15 +31,35 @@ static struct pci_controller coreboot_hose; +static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev, + struct pci_config_table *table) +{ + u8 secondary; + hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary); + hose->last_busno = max(hose->last_busno, secondary); + pci_hose_scan_bus(hose, secondary); +} + +static struct pci_config_table pci_coreboot_config_table[] = { + /* vendor, device, class, bus, dev, func */ + { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI, + PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge }, + {} +}; + void pci_init_board(void) { + coreboot_hose.config_table = pci_coreboot_config_table; coreboot_hose.first_busno = 0; - coreboot_hose.last_busno = 0xff; - coreboot_hose.region_count = 0; + coreboot_hose.last_busno = 0; + + pci_set_region(coreboot_hose.regions + 0, 0x0, 0x0, 0xffffffff, + PCI_REGION_MEM); + coreboot_hose.region_count = 1; pci_setup_type1(&coreboot_hose); pci_register_hose(&coreboot_hose); - coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose); + pci_hose_scan(&coreboot_hose); } From cd23e6923f371b16b9ee9f115d15c9dd46c2f558 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 27 Nov 2012 21:08:12 +0000 Subject: [PATCH 12/13] x86: Remove coreboot start16 code Now that coreboot doesn't need the start16 code, remove it. We need to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also. Signed-off-by: Simon Glass --- board/chromebook-x86/coreboot/coreboot_start16.S | 13 ------------- include/configs/coreboot.h | 2 +- 2 files changed, 1 insertion(+), 14 deletions(-) diff --git a/board/chromebook-x86/coreboot/coreboot_start16.S b/board/chromebook-x86/coreboot/coreboot_start16.S index 9ad06df8b..6b3d92d61 100644 --- a/board/chromebook-x86/coreboot/coreboot_start16.S +++ b/board/chromebook-x86/coreboot/coreboot_start16.S @@ -22,19 +22,6 @@ * MA 02111-1307 USA */ -/* - * 16bit initialization code. - * This code have to map the area of the boot flash - * that is used by U-boot to its final destination. - */ - -.text -.section .start16, "ax" -.code16 -.globl board_init16 -board_init16: - jmp board_init16_ret - .section .bios, "ax" .code16 .globl realmode_reset diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 8d3c21f05..12d101652 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_X86_NO_RESET_VECTOR /*----------------------------------------------------------------------- * Watchdog Configuration From d02a568e9aa3c3500d9b680f60782c192fd51691 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 25 Nov 2012 20:12:16 +0000 Subject: [PATCH 13/13] x86: coreboot: Enable LPC TPM Coreboot boards have an LPC TPM connected, so enable this. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 12d101652..5da006fbd 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -67,6 +67,10 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */