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Fix ATC board configuration and flash driver

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This commit is contained in:
wdenk 2003-05-05 17:09:41 +00:00
parent 9c62cc58b8
commit e600962991
2 changed files with 106 additions and 108 deletions
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210
board/atc/flash.c
View File

@ -292,9 +292,8 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
/* The manufacturer codes are only 1 byte, so just use 1 byte. /* The manufacturer codes are only 1 byte, so just use 1 byte.
* This works for any bus width and any FLASH device width. * This works for any bus width and any FLASH device width.
*/ */
udelay(1000000);//psl udelay(100);
//psl switch (addr[1] & 0xff) { switch (addr[0] & 0xff) {
switch (addr[0] & 0xff) {//psl
case (uchar)AMD_MANUFACT: case (uchar)AMD_MANUFACT:
info->flash_id = FLASH_MAN_AMD; info->flash_id = FLASH_MAN_AMD;
@ -312,7 +311,6 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
} }
/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
//psl if (info->flash_id != FLASH_UNKNOWN) switch (addr[0]) {
if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) { if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */ case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
@ -519,46 +517,46 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
*/ */
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{ {
FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
int bytes; /* number of bytes to program in current word */ int bytes; /* number of bytes to program in current word */
int left; /* number of bytes left to program */ int left; /* number of bytes left to program */
int i, res; int i, res;
for (left = cnt, res = 0; for (left = cnt, res = 0;
left > 0 && res == 0; left > 0 && res == 0;
addr += sizeof(data), left -= sizeof(data) - bytes) { addr += sizeof(data), left -= sizeof(data) - bytes) {
bytes = addr & (sizeof(data) - 1); bytes = addr & (sizeof(data) - 1);
addr &= ~(sizeof(data) - 1); addr &= ~(sizeof(data) - 1);
/* combine source and destination data so can program /* combine source and destination data so can program
* an entire word of 16 or 32 bits * an entire word of 16 or 32 bits
*/ */
for (i = 0; i < sizeof(data); i++) { for (i = 0; i < sizeof(data); i++) {
data <<= 8; data <<= 8;
if (i < bytes || i - bytes >= left ) if (i < bytes || i - bytes >= left )
data += *((uchar *)addr + i); data += *((uchar *)addr + i);
else else
data += *src++; data += *src++;
}
/* write one word to the flash */
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD:
res = write_word_amd(info, (FPWV *)addr, data);
break;
case FLASH_MAN_INTEL:
res = write_word_intel(info, (FPWV *)addr, data);
break;
default:
/* unknown flash type, error! */
printf ("missing or unknown FLASH type\n");
res = 1; /* not really a timeout, but gives error */
break;
}
} }
/* write one word to the flash */ return (res);
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD:
res = write_word_amd(info, (FPWV *)addr, data);
break;
case FLASH_MAN_INTEL:
res = write_word_intel(info, (FPWV *)addr, data);
break;
default:
/* unknown flash type, error! */
printf ("missing or unknown FLASH type\n");
res = 1; /* not really a timeout, but gives error */
break;
}
}
return (res);
} }
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
@ -573,43 +571,43 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
*/ */
static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
{ {
ulong start; ulong start;
int flag; int flag;
int res = 0; /* result, assume success */ int res = 0; /* result, assume success */
FPWV *base; /* first address in flash bank */ FPWV *base; /* first address in flash bank */
/* Check if Flash is (sufficiently) erased */ /* Check if Flash is (sufficiently) erased */
if ((*dest & data) != data) { if ((*dest & data) != data) {
return (2); return (2);
}
base = (FPWV *)(info->start[0]);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
*dest = data; /* start programming the data */
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
start = get_timer (0);
/* data polling for D7 */
while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
*dest = (FPW)0x00F000F0; /* reset bank */
res = 1;
} }
}
return (res);
base = (FPWV *)(info->start[0]);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
*dest = data; /* start programming the data */
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
start = get_timer (0);
/* data polling for D7 */
while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
*dest = (FPW)0x00F000F0; /* reset bank */
res = 1;
}
}
return (res);
} }
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
@ -624,42 +622,42 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
*/ */
static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data) static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
{ {
ulong start; ulong start;
int flag; int flag;
int res = 0; /* result, assume success */ int res = 0; /* result, assume success */
/* Check if Flash is (sufficiently) erased */ /* Check if Flash is (sufficiently) erased */
if ((*dest & data) != data) { if ((*dest & data) != data) {
return (2); return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
*dest = (FPW)0x00500050; /* clear status register */
*dest = (FPW)0x00FF00FF; /* make sure in read mode */
*dest = (FPW)0x00400040; /* program setup */
*dest = data; /* start programming the data */
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
start = get_timer (0);
while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
*dest = (FPW)0x00B000B0; /* Suspend program */
res = 1;
} }
}
if (res == 0 && (*dest & (FPW)0x00100010)) /* Disable interrupts which might cause a timeout here */
res = 1; /* write failed, time out error is close enough */ flag = disable_interrupts();
*dest = (FPW)0x00500050; /* clear status register */ *dest = (FPW)0x00500050; /* clear status register */
*dest = (FPW)0x00FF00FF; /* make sure in read mode */ *dest = (FPW)0x00FF00FF; /* make sure in read mode */
*dest = (FPW)0x00400040; /* program setup */
return (res); *dest = data; /* start programming the data */
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
start = get_timer (0);
while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
*dest = (FPW)0x00B000B0; /* Suspend program */
res = 1;
}
}
if (res == 0 && (*dest & (FPW)0x00100010))
res = 1; /* write failed, time out error is close enough */
*dest = (FPW)0x00500050; /* clear status register */
*dest = (FPW)0x00FF00FF; /* make sure in read mode */
return (res);
} }

4
include/configs/atc.h
View File

@ -232,7 +232,7 @@
#define CFG_SDRAM_BASE 0x00000000 #define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ #define CFG_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */
#define CFG_MONITOR_BASE TEXT_BASE #define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
@ -242,7 +242,7 @@
#if 1 #if 1
/* environment is in Flash */ /* environment is in Flash */
#define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_IS_IN_FLASH 1
# define CFG_ENV_ADDR (CFG_FLASH_BASE+0x40000) # define CFG_ENV_ADDR (CFG_FLASH_BASE+0x30000)
# define CFG_ENV_SIZE 0x10000 # define CFG_ENV_SIZE 0x10000
# define CFG_ENV_SECT_SIZE 0x10000 # define CFG_ENV_SECT_SIZE 0x10000
#else #else