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Merge branch 'mpc86xx'

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This commit is contained in:
Jon Loeliger 2006-08-22 12:26:51 -05:00
commit f1f33de332
12 changed files with 503 additions and 517 deletions
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21
board/mpc8641hpcn/mpc8641hpcn.c
View File

@ -122,7 +122,8 @@ initdram(int board_type)
#if defined(CFG_DRAM_TEST) #if defined(CFG_DRAM_TEST)
int testdram(void) int
testdram(void)
{ {
uint *pstart = (uint *) CFG_MEMTEST_START; uint *pstart = (uint *) CFG_MEMTEST_START;
uint *pend = (uint *) CFG_MEMTEST_END; uint *pend = (uint *) CFG_MEMTEST_END;
@ -160,7 +161,8 @@ int testdram(void)
/* /*
* Fixed sdram init -- doesn't use serial presence detect. * Fixed sdram init -- doesn't use serial presence detect.
*/ */
long int fixed_sdram(void) long int
fixed_sdram(void)
{ {
#if !defined(CFG_RAMBOOT) #if !defined(CFG_RAMBOOT)
volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile immap_t *immap = (immap_t *) CFG_IMMR;
@ -215,8 +217,7 @@ static struct pci_config_table pci_fsl86xxads_config_table[] = {
PCI_IDSEL_NUMBER, PCI_ANY_ID, PCI_IDSEL_NUMBER, PCI_ANY_ID,
pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
PCI_ENET0_MEMADDR, PCI_ENET0_MEMADDR,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
} },
{} {}
}; };
#endif #endif
@ -230,9 +231,7 @@ static struct pci_controller hose = {
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
void pci_init_board(void)
void
pci_init_board(void)
{ {
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
extern void pci_mpc86xx_init(struct pci_controller *hose); extern void pci_mpc86xx_init(struct pci_controller *hose);
@ -305,7 +304,8 @@ mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
corepll = strfractoint(argv[4]); corepll = strfractoint(argv[4]);
val = val + set_px_corepll(corepll); val = val + set_px_corepll(corepll);
val = val + set_px_mpxpll(simple_strtoul(argv[5], NULL, 10)); val = val + set_px_mpxpll(simple_strtoul(argv[5],
NULL, 10));
if (val == 3) { if (val == 3) {
puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n"); puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
set_altbank(); set_altbank();
@ -360,12 +360,14 @@ my_usage:
puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n"); puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
} }
/* /*
* get_board_sys_clk * get_board_sys_clk
* Reads the FPGA on board for CONFIG_SYS_CLK_FREQ * Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
*/ */
unsigned long get_board_sys_clk(ulong dummy) unsigned long
get_board_sys_clk(ulong dummy)
{ {
u8 i, go_bit, rd_clks; u8 i, go_bit, rd_clks;
ulong val = 0; ulong val = 0;
@ -422,4 +424,3 @@ unsigned long get_board_sys_clk(ulong dummy)
return val; return val;
} }

5
board/mpc8641hpcn/pixis.c
View File

@ -251,13 +251,10 @@ int disable_watchdog(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0; return 0;
} }
U_BOOT_CMD( U_BOOT_CMD(
diswd, 1, 0, disable_watchdog, diswd, 1, 0, disable_watchdog,
"diswd - Disable watchdog timer \n", "diswd - Disable watchdog timer \n",
NULL NULL);
);
/* /*
* This function takes the non-integral cpu:mpx pll ratio * This function takes the non-integral cpu:mpx pll ratio

90
board/mpc8641hpcn/sys_eeprom.c
View File

@ -48,29 +48,33 @@ int mac_show(void)
int i; int i;
unsigned char ethaddr[8][18]; unsigned char ethaddr[8][18];
printf("ID %c%c%c%c\n", mac_data.id[0],\ printf("ID %c%c%c%c\n",
mac_data.id[1],\ mac_data.id[0],
mac_data.id[2],\ mac_data.id[1],
mac_data.id[2],
mac_data.id[3]); mac_data.id[3]);
printf("Errata %c%c%c%c%c\n", mac_data.errata[0],\ printf("Errata %c%c%c%c%c\n",
mac_data.errata[1],\ mac_data.errata[0],
mac_data.errata[2],\ mac_data.errata[1],
mac_data.errata[3],\ mac_data.errata[2],
mac_data.errata[3],
mac_data.errata[4]); mac_data.errata[4]);
printf("Date %c%c%c%c%c%c%c\n", mac_data.date[0],\ printf("Date %c%c%c%c%c%c%c\n",
mac_data.date[1],\ mac_data.date[0],
mac_data.date[2],\ mac_data.date[1],
mac_data.date[3],\ mac_data.date[2],
mac_data.date[4],\ mac_data.date[3],
mac_data.date[5],\ mac_data.date[4],
mac_data.date[5],
mac_data.date[6]); mac_data.date[6]);
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
sprintf(ethaddr[i],"%02x:%02x:%02x:%02x:%02x:%02x",\ sprintf(ethaddr[i],
mac_data.mac[i][0],\ "%02x:%02x:%02x:%02x:%02x:%02x",
mac_data.mac[i][1],\ mac_data.mac[i][0],
mac_data.mac[i][2],\ mac_data.mac[i][1],
mac_data.mac[i][3],\ mac_data.mac[i][2],
mac_data.mac[i][4],\ mac_data.mac[i][3],
mac_data.mac[i][4],
mac_data.mac[i][5]); mac_data.mac[i][5]);
printf("MAC %d %s\n", i, ethaddr[i]); printf("MAC %d %s\n", i, ethaddr[i]);
} }
@ -100,10 +104,10 @@ int mac_read(void)
printf("Check CRC on reading ..."); printf("Check CRC on reading ...");
crc = crc32(crc, data, length - 4); crc = crc32(crc, data, length - 4);
if (crc != mac_data.crc) { if (crc != mac_data.crc) {
printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",mac_data.crc,crc); printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
mac_data.crc, crc);
return -1; return -1;
} } else {
else {
printf("CRC OK\n"); printf("CRC OK\n");
mac_show(); mac_show();
} }
@ -125,7 +129,9 @@ int mac_prog(void)
crc = crc32(crc, eeprom_data, length - 4); crc = crc32(crc, eeprom_data, length - 4);
mac_data.crc = crc; mac_data.crc = crc;
for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) { for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
ret = i2c_write(dev, i, 1, ptr, (length-i) <8 ? (length-i) : 8); ret =
i2c_write(dev, i, 1, ptr,
(length - i) < 8 ? (length - i) : 8);
udelay(5000); /* 5ms write cycle timing */ udelay(5000); /* 5ms write cycle timing */
if (ret) if (ret)
break; break;
@ -133,8 +139,7 @@ int mac_prog(void)
if (ret) { if (ret) {
printf("Programming failed.\n"); printf("Programming failed.\n");
return -1; return -1;
} } else {
else {
printf("Programming %d bytes. Reading back ...\n", length); printf("Programming %d bytes. Reading back ...\n", length);
mac_read(); mac_read();
} }
@ -180,7 +185,8 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
} }
break; break;
case 'p': /* number of ports */ case 'p': /* number of ports */
mac_data.tab_size = (unsigned char)simple_strtoul(argv[2],NULL,16); mac_data.tab_size =
(unsigned char)simple_strtoul(argv[2], NULL, 16);
break; break;
case '0': /* mac 0 */ case '0': /* mac 0 */
case '1': /* mac 1 */ case '1': /* mac 1 */
@ -192,7 +198,9 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
case '7': /* mac 7 */ case '7': /* mac 7 */
mac_val = simple_strtoull(argv[2], NULL, 16); mac_val = simple_strtoull(argv[2], NULL, 16);
for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) {
mac_data.mac[cmd-'0'][i] = *((unsigned char *)(((unsigned int)(&mac_val))+i+2)); mac_data.mac[cmd - '0'][i] =
*((unsigned char *)
(((unsigned int)(&mac_val)) + i + 2));
} }
break; break;
case 'h': /* help */ case 'h': /* help */
@ -200,8 +208,7 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf("Usage:\n%s\n", cmdtp->usage); printf("Usage:\n%s\n", cmdtp->usage);
break; break;
} }
} } else {
else {
mac_show(); mac_show();
} }
return 0; return 0;
@ -210,7 +217,10 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int mac_read_from_eeprom(void) int mac_read_from_eeprom(void)
{ {
int length, i; int length, i;
unsigned char dev = ID_EEPROM_ADDR, *data, ethaddr[4][18], enetvar[32]; unsigned char dev = ID_EEPROM_ADDR;
unsigned char *data;
unsigned char ethaddr[4][18];
unsigned char enetvar[32];
unsigned int crc = 0; unsigned int crc = 0;
length = sizeof(EEPROM_data); length = sizeof(EEPROM_data);
@ -223,18 +233,20 @@ int mac_read_from_eeprom(void)
crc = crc32(crc, data, length - 4); crc = crc32(crc, data, length - 4);
if (crc != mac_data.crc) { if (crc != mac_data.crc) {
return -1; return -1;
} } else {
else {
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) { if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
sprintf(ethaddr[i], "%02x:%02x:%02x:%02x:%02x:%02x", \ sprintf(ethaddr[i],
mac_data.mac[i][0], \ "%02x:%02x:%02x:%02x:%02x:%02x",
mac_data.mac[i][1], \ mac_data.mac[i][0],
mac_data.mac[i][2], \ mac_data.mac[i][1],
mac_data.mac[i][3], \ mac_data.mac[i][2],
mac_data.mac[i][4], \ mac_data.mac[i][3],
mac_data.mac[i][4],
mac_data.mac[i][5]); mac_data.mac[i][5]);
sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i); sprintf(enetvar,
i ? "eth%daddr" : "ethaddr",
i);
setenv(enetvar, ethaddr[i]); setenv(enetvar, ethaddr[i]);
} }
} }

24
cpu/mpc86xx/cpu.c
View File

@ -38,7 +38,8 @@ extern void mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag,
#endif #endif
int checkcpu (void) int
checkcpu(void)
{ {
sys_info_t sysinfo; sys_info_t sysinfo;
uint pvr, svr; uint pvr, svr;
@ -126,8 +127,10 @@ soft_restart(unsigned long addr)
{ {
#ifndef CONFIG_MPC8641HPCN #ifndef CONFIG_MPC8641HPCN
/* SRR0 has system reset vector, SRR1 has default MSR value */ /*
/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */ * SRR0 has system reset vector, SRR1 has default MSR value
* rfi restores MSR from SRR1 and sets the PC to the SRR0 value
*/
__asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr)); __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
__asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4"); __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
@ -192,7 +195,8 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* /*
* Get timebase clock frequency * Get timebase clock frequency
*/ */
unsigned long get_tbclk(void) unsigned long
get_tbclk(void)
{ {
sys_info_t sys_info; sys_info_t sys_info;
@ -210,7 +214,8 @@ watchdog_reset(void)
#if defined(CONFIG_DDR_ECC) #if defined(CONFIG_DDR_ECC)
void dma_init(void) void
dma_init(void)
{ {
volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile ccsr_dma_t *dma = &immap->im_dma; volatile ccsr_dma_t *dma = &immap->im_dma;
@ -220,7 +225,8 @@ void dma_init(void)
asm("sync; isync"); asm("sync; isync");
} }
uint dma_check(void) uint
dma_check(void)
{ {
volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile ccsr_dma_t *dma = &immap->im_dma; volatile ccsr_dma_t *dma = &immap->im_dma;
@ -237,7 +243,8 @@ uint dma_check(void)
return status; return status;
} }
int dma_xfer(void *dest, uint count, void *src) int
dma_xfer(void *dest, uint count, void *src)
{ {
volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile ccsr_dma_t *dma = &immap->im_dma; volatile ccsr_dma_t *dma = &immap->im_dma;
@ -256,7 +263,8 @@ int dma_xfer(void *dest, uint count, void *src)
#ifdef CONFIG_OF_FLAT_TREE #ifdef CONFIG_OF_FLAT_TREE
void ft_cpu_setup(void *blob, bd_t *bd) void
ft_cpu_setup(void *blob, bd_t *bd)
{ {
u32 *p; u32 *p;
ulong clock; ulong clock;

12
cpu/mpc86xx/i2c.c
View File

@ -174,8 +174,7 @@ __i2c_read (u8 *data, int length)
/* Generate ack on last next to last byte */ /* Generate ack on last next to last byte */
if (i == length - 2) if (i == length - 2)
writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA
| MPC86xx_I2CCR_TXAK, | MPC86xx_I2CCR_TXAK, I2CCCR);
I2CCCR);
/* Generate stop on last byte */ /* Generate stop on last byte */
if (i == length - 1) if (i == length - 1)
@ -236,7 +235,8 @@ exit:
return !(i == length); return !(i == length);
} }
int i2c_probe (uchar chip) int
i2c_probe(uchar chip)
{ {
int tmp; int tmp;
@ -250,7 +250,8 @@ int i2c_probe (uchar chip)
return i2c_read(chip, 0, 1, (char *)&tmp, 1); return i2c_read(chip, 0, 1, (char *)&tmp, 1);
} }
uchar i2c_reg_read (uchar i2c_addr, uchar reg) uchar
i2c_reg_read(uchar i2c_addr, uchar reg)
{ {
char buf[1]; char buf[1];
@ -259,7 +260,8 @@ uchar i2c_reg_read (uchar i2c_addr, uchar reg)
return buf[0]; return buf[0];
} }
void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val) void
i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
{ {
i2c_write(i2c_addr, reg, 1, &val, 1); i2c_write(i2c_addr, reg, 1, &val, 1);
} }

36
cpu/mpc86xx/interrupts.c
View File

@ -64,7 +64,6 @@ static __inline__ unsigned long get_dec (void)
return val; return val;
} }
static __inline__ void set_dec(unsigned long val) static __inline__ void set_dec(unsigned long val)
{ {
if (val) if (val)
@ -77,7 +76,6 @@ int interrupt_init_cpu (unsigned *decrementer_count)
return 0; return 0;
} }
int interrupt_init(void) int interrupt_init(void)
{ {
int ret; int ret;
@ -89,18 +87,21 @@ int interrupt_init (void)
return ret; return ret;
decrementer_count = get_tbclk() / CFG_HZ; decrementer_count = get_tbclk() / CFG_HZ;
debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count); debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n",
(get_tbclk() / 1000000),
decrementer_count);
set_dec(decrementer_count); set_dec(decrementer_count);
set_msr(get_msr() | MSR_EE); set_msr(get_msr() | MSR_EE);
debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec()); debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n",
get_msr(),
get_dec());
return 0; return 0;
} }
void enable_interrupts(void) void enable_interrupts(void)
{ {
set_msr(get_msr() | MSR_EE); set_msr(get_msr() | MSR_EE);
@ -115,7 +116,6 @@ int disable_interrupts (void)
return (msr & MSR_EE) != 0; return (msr & MSR_EE) != 0;
} }
void increment_timestamp(void) void increment_timestamp(void)
{ {
timestamp++; timestamp++;
@ -126,13 +126,11 @@ void increment_timestamp(void)
* with interrupts disabled. * with interrupts disabled.
* Trivial implementation - no need to be really accurate. * Trivial implementation - no need to be really accurate.
*/ */
void void timer_interrupt_cpu(struct pt_regs *regs)
timer_interrupt_cpu (struct pt_regs *regs)
{ {
/* nothing to do here */ /* nothing to do here */
} }
void timer_interrupt(struct pt_regs *regs) void timer_interrupt(struct pt_regs *regs)
{ {
/* call cpu specific function from $(CPU)/interrupts.c */ /* call cpu specific function from $(CPU)/interrupts.c */
@ -158,7 +156,6 @@ void timer_interrupt (struct pt_regs *regs)
board_show_activity(timestamp); board_show_activity(timestamp);
#endif /* CONFIG_SHOW_ACTIVITY */ #endif /* CONFIG_SHOW_ACTIVITY */
} }
void reset_timer(void) void reset_timer(void)
@ -180,22 +177,18 @@ void set_timer (ulong t)
* Install and free a interrupt handler. Not implemented yet. * Install and free a interrupt handler. Not implemented yet.
*/ */
void void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
{ {
} }
void void irq_free_handler(int vec)
irq_free_handler(int vec)
{ {
} }
/* /*
* irqinfo - print information about PCI devices,not implemented. * irqinfo - print information about PCI devices,not implemented.
*/ */
int int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{ {
printf("\nInterrupt-unsupported:\n"); printf("\nInterrupt-unsupported:\n");
@ -205,14 +198,7 @@ do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* /*
* Handle external interrupts * Handle external interrupts
*/ */
void void external_interrupt(struct pt_regs *regs)
external_interrupt(struct pt_regs *regs)
{ {
puts("external_interrupt (oops!)\n"); puts("external_interrupt (oops!)\n");
} }

35
cpu/mpc86xx/pci.c
View File

@ -47,46 +47,53 @@ pci_mpc86xx_init(struct pci_controller *hose)
uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16; uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
if ((io_sel == 2 || io_sel == 3 || io_sel == 5 || io_sel == 6 || if ((io_sel == 2 || io_sel == 3 || io_sel == 5 || io_sel == 6 ||
io_sel == 7 || io_sel == 0xf) && !(devdisr & MPC86xx_DEVDISR_PCIEX1)){ io_sel == 7 || io_sel == 0xf)
&& !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
printf("PCI-EXPRESS 1: Configured as %s \n", printf("PCI-EXPRESS 1: Configured as %s \n",
pcie1_agent ? "Agent" : "Host"); pcie1_agent ? "Agent" : "Host");
if(pcie1_agent) return; /*Don't scan bus when configured as agent*/ if (pcie1_agent)
return; /*Don't scan bus when configured as agent */
printf(" Scanning PCIE bus"); printf(" Scanning PCIE bus");
debug("0x%08x=0x%08x ", &pcie1->pme_msg_det,pcie1->pme_msg_det); debug("0x%08x=0x%08x ",
&pcie1->pme_msg_det,
pcie1->pme_msg_det);
if (pcie1->pme_msg_det) { if (pcie1->pme_msg_det) {
pcie1->pme_msg_det = 0xffffffff; pcie1->pme_msg_det = 0xffffffff;
debug(" with errors. Clearing. Now 0x%08x", debug(" with errors. Clearing. Now 0x%08x",
pcie1->pme_msg_det); pcie1->pme_msg_det);
} }
debug("\n"); debug("\n");
} } else {
else{
printf("PCI-EXPRESS 1 disabled!\n"); printf("PCI-EXPRESS 1 disabled!\n");
return; return;
} }
/*set first_bus=0 only skipped B0:D0:F0 which is /*
* Set first_bus=0 only skipped B0:D0:F0 which is
* a reserved device in M1575, but make it easy for * a reserved device in M1575, but make it easy for
* most of the scan process. * most of the scan process.
*/ */
hose->first_busno = 0x00; hose->first_busno = 0x00;
hose->last_busno = 0xfe; hose->last_busno = 0xfe;
pcie_setup_indirect(hose, pcie_setup_indirect(hose, (CFG_IMMR + 0x8000), (CFG_IMMR + 0x8004));
(CFG_IMMR+0x8000),
(CFG_IMMR+0x8004));
pci_hose_read_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, &temp16); pci_hose_read_config_word(hose,
PCI_BDF(0, 0, 0), PCI_COMMAND, &temp16);
temp16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | temp16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY | PCI_COMMAND_IO; PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, temp16); pci_hose_write_config_word(hose,
PCI_BDF(0, 0, 0), PCI_COMMAND, temp16);
pci_hose_write_config_word(hose, PCI_BDF(0, 0, 0), PCI_STATUS, 0xffff); pci_hose_write_config_word(hose, PCI_BDF(0, 0, 0), PCI_STATUS, 0xffff);
pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER, 0x80); pci_hose_write_config_byte(hose,
PCI_BDF(0, 0, 0), PCI_LATENCY_TIMER, 0x80);
pci_hose_read_config_dword(hose, PCI_BDF(0,0,0), PCI_PRIMARY_BUS, &temp32); pci_hose_read_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
&temp32);
temp32 = (temp32 & 0xff000000) | (0xff) | (0x0 << 8) | (0xfe << 16); temp32 = (temp32 & 0xff000000) | (0xff) | (0x0 << 8) | (0xfe << 16);
pci_hose_write_config_dword(hose, PCI_BDF(0,0,0), PCI_PRIMARY_BUS, temp32); pci_hose_write_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
temp32);
pcie1->powar1 = 0; pcie1->powar1 = 0;
pcie1->powar2 = 0; pcie1->powar2 = 0;

45
cpu/mpc86xx/pcie_indirect.c
View File

@ -28,20 +28,23 @@
static int static int
indirect_read_config_pcie(struct pci_controller *hose, indirect_read_config_pcie(struct pci_controller *hose,
pci_dev_t dev, int offset, pci_dev_t dev,
int len,u32 *val) int offset,
int len,
u32 *val)
{ {
int bus = PCI_BUS(dev); int bus = PCI_BUS(dev);
char devfn = ( (PCI_DEV(dev) << 4 ) | (PCI_FUNC(dev)) ) ;
unsigned char *cfg_data; volatile unsigned char *cfg_data;
u32 temp; u32 temp;
PEX_FIX; PEX_FIX;
if (bus == 0xff) { if (bus == 0xff) {
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); PCI_CFG_OUT(hose->cfg_addr,
dev | (offset & 0xfc) | 0x80000001);
} else { } else {
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); PCI_CFG_OUT(hose->cfg_addr,
dev | (offset & 0xfc) | 0x80000000);
} }
/* /*
* Note: the caller has already checked that offset is * Note: the caller has already checked that offset is
@ -50,7 +53,7 @@ indirect_read_config_pcie(struct pci_controller *hose,
/* ERRATA PCI-Ex 12 - Configuration Address/Data Alignment */ /* ERRATA PCI-Ex 12 - Configuration Address/Data Alignment */
cfg_data = hose->cfg_data; cfg_data = hose->cfg_data;
PEX_FIX; PEX_FIX;
temp = in_le32(cfg_data); temp = in_le32((u32 *) cfg_data);
switch (len) { switch (len) {
case 1: case 1:
*val = (temp >> (((offset & 3)) * 8)) & 0xff; *val = (temp >> (((offset & 3)) * 8)) & 0xff;
@ -74,16 +77,16 @@ indirect_write_config_pcie(struct pci_controller *hose,
u32 val) u32 val)
{ {
int bus = PCI_BUS(dev); int bus = PCI_BUS(dev);
char devfn = ( (PCI_DEV(dev) << 4 ) | (PCI_FUNC(dev)) ) ; volatile unsigned char *cfg_data;
unsigned char *cfg_data;
u32 temp; u32 temp;
PEX_FIX; PEX_FIX;
if (bus == 0xff) { if (bus == 0xff) {
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); PCI_CFG_OUT(hose->cfg_addr,
dev | (offset & 0xfc) | 0x80000001);
} else { } else {
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); PCI_CFG_OUT(hose->cfg_addr,
dev | (offset & 0xfc) | 0x80000000);
} }
/* /*
@ -95,23 +98,23 @@ indirect_write_config_pcie(struct pci_controller *hose,
switch (len) { switch (len) {
case 1: case 1:
PEX_FIX; PEX_FIX;
temp = in_le32(cfg_data); temp = in_le32((u32 *) cfg_data);
temp = (temp & ~(0xff << ((offset & 3) * 8))) | temp = (temp & ~(0xff << ((offset & 3) * 8))) |
(val << ((offset & 3) * 8)); (val << ((offset & 3) * 8));
PEX_FIX; PEX_FIX;
out_le32(cfg_data, temp); out_le32((u32 *) cfg_data, temp);
break; break;
case 2: case 2:
PEX_FIX; PEX_FIX;
temp = in_le32(cfg_data); temp = in_le32((u32 *) cfg_data);
temp = (temp & ~(0xffff << ((offset & 3) * 8))); temp = (temp & ~(0xffff << ((offset & 3) * 8)));
temp |= (val << ((offset & 3) * 8)); temp |= (val << ((offset & 3) * 8));
PEX_FIX; PEX_FIX;
out_le32(cfg_data, temp); out_le32((u32 *) cfg_data, temp);
break; break;
default: default:
PEX_FIX; PEX_FIX;
out_le32(cfg_data, val); out_le32((u32 *) cfg_data, val);
break; break;
} }
PEX_FIX; PEX_FIX;
@ -155,7 +158,7 @@ static int
indirect_write_config_byte_pcie(struct pci_controller *hose, indirect_write_config_byte_pcie(struct pci_controller *hose,
pci_dev_t dev, pci_dev_t dev,
int offset, int offset,
char val) u8 val)
{ {
return indirect_write_config_pcie(hose, dev, offset, 1, (u32) val); return indirect_write_config_pcie(hose, dev, offset, 1, (u32) val);
} }
@ -173,15 +176,13 @@ static int
indirect_write_config_dword_pcie(struct pci_controller *hose, indirect_write_config_dword_pcie(struct pci_controller *hose,
pci_dev_t dev, pci_dev_t dev,
int offset, int offset,
unsigned short val) u32 val)
{ {
return indirect_write_config_pcie(hose, dev, offset, 4, val); return indirect_write_config_pcie(hose, dev, offset, 4, val);
} }
void void
pcie_setup_indirect(struct pci_controller* hose, pcie_setup_indirect(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
u32 cfg_addr,
u32 cfg_data)
{ {
pci_set_ops(hose, pci_set_ops(hose,
indirect_read_config_byte_pcie, indirect_read_config_byte_pcie,

123
cpu/mpc86xx/start.S
View File

@ -662,142 +662,140 @@ get_svr:
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: in8 */ * Function: in8
/* Description: Input 8 bits */ * Description: Input 8 bits
/*------------------------------------------------------------------------------- */ */
.globl in8 .globl in8
in8: in8:
lbz r3,0x0000(r3) lbz r3,0x0000(r3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: out8 */ * Function: out8
/* Description: Output 8 bits */ * Description: Output 8 bits
/*------------------------------------------------------------------------------- */ */
.globl out8 .globl out8
out8: out8:
stb r4,0x0000(r3) stb r4,0x0000(r3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: out16 */ * Function: out16
/* Description: Output 16 bits */ * Description: Output 16 bits
/*------------------------------------------------------------------------------- */ */
.globl out16 .globl out16
out16: out16:
sth r4,0x0000(r3) sth r4,0x0000(r3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: out16r */ * Function: out16r
/* Description: Byte reverse and output 16 bits */ * Description: Byte reverse and output 16 bits
/*------------------------------------------------------------------------------- */ */
.globl out16r .globl out16r
out16r: out16r:
sthbrx r4,r0,r3 sthbrx r4,r0,r3
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: out32 */ * Function: out32
/* Description: Output 32 bits */ * Description: Output 32 bits
/*------------------------------------------------------------------------------- */ */
.globl out32 .globl out32
out32: out32:
stw r4,0x0000(r3) stw r4,0x0000(r3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: out32r */ * Function: out32r
/* Description: Byte reverse and output 32 bits */ * Description: Byte reverse and output 32 bits
/*------------------------------------------------------------------------------- */ */
.globl out32r .globl out32r
out32r: out32r:
stwbrx r4,r0,r3 stwbrx r4,r0,r3
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: in16 */ * Function: in16
/* Description: Input 16 bits */ * Description: Input 16 bits
/*------------------------------------------------------------------------------- */ */
.globl in16 .globl in16
in16: in16:
lhz r3,0x0000(r3) lhz r3,0x0000(r3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: in16r */ * Function: in16r
/* Description: Input 16 bits and byte reverse */ * Description: Input 16 bits and byte reverse
/*------------------------------------------------------------------------------- */ */
.globl in16r .globl in16r
in16r: in16r:
lhbrx r3,r0,r3 lhbrx r3,r0,r3
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: in32 */ * Function: in32
/* Description: Input 32 bits */ * Description: Input 32 bits
/*------------------------------------------------------------------------------- */ */
.globl in32 .globl in32
in32: in32:
lwz 3,0x0000(3) lwz 3,0x0000(3)
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: in32r */ * Function: in32r
/* Description: Input 32 bits and byte reverse */ * Description: Input 32 bits and byte reverse
/*------------------------------------------------------------------------------- */ */
.globl in32r .globl in32r
in32r: in32r:
lwbrx r3,r0,r3 lwbrx r3,r0,r3
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: ppcDcbf */ * Function: ppcDcbf
/* Description: Data Cache block flush */ * Description: Data Cache block flush
/* Input: r3 = effective address */ * Input: r3 = effective address
/* Output: none. */ * Output: none.
/*------------------------------------------------------------------------------- */ */
.globl ppcDcbf .globl ppcDcbf
ppcDcbf: ppcDcbf:
dcbf r0,r3 dcbf r0,r3
blr blr
/*------------------------------------------------------------------------------- */ /*
/* Function: ppcDcbi */ * Function: ppcDcbi
/* Description: Data Cache block Invalidate */ * Description: Data Cache block Invalidate
/* Input: r3 = effective address */ * Input: r3 = effective address
/* Output: none. */ * Output: none.
/*------------------------------------------------------------------------------- */ */
.globl ppcDcbi .globl ppcDcbi
ppcDcbi: ppcDcbi:
dcbi r0,r3 dcbi r0,r3
blr blr
/*-------------------------------------------------------------------------- /*
* Function: ppcDcbz * Function: ppcDcbz
* Description: Data Cache block zero. * Description: Data Cache block zero.
* Input: r3 = effective address * Input: r3 = effective address
* Output: none. * Output: none.
*-------------------------------------------------------------------------- */ */
.globl ppcDcbz .globl ppcDcbz
ppcDcbz: ppcDcbz:
dcbz r0,r3 dcbz r0,r3
blr blr
/*-------------------------------------------------------------------------- */ /*
/* Function: ppcSync */ * Function: ppcSync
/* Description: Processor Synchronize */ * Description: Processor Synchronize
/* Input: none. */ * Input: none.
/* Output: none. */ * Output: none.
/*-------------------------------------------------------------------------- */ */
.globl ppcSync .globl ppcSync
ppcSync: ppcSync:
sync sync
blr blr
/*-----------------------------------------------------------------------*/
/* /*
* void relocate_code (addr_sp, gd, addr_moni) * void relocate_code (addr_sp, gd, addr_moni)
* *
@ -1205,7 +1203,6 @@ secondary_cpu_setup:
bl icache_enable bl icache_enable
sync sync
/* TBEN in HID0 */ /* TBEN in HID0 */
mfspr r4, HID0 mfspr r4, HID0
oris r4, r4, 0x0400 oris r4, r4, 0x0400

47
cpu/mpc86xx/traps.c
View File

@ -64,7 +64,8 @@ print_backtrace(unsigned long *sp)
if (cnt++ % 7 == 0) if (cnt++ % 7 == 0)
printf("\n"); printf("\n");
printf("%08lX ", i); printf("%08lX ", i);
if (cnt > 32) break; if (cnt > 32)
break;
sp = (unsigned long *)*sp; sp = (unsigned long *)*sp;
} }
printf("\n"); printf("\n");
@ -80,21 +81,19 @@ show_regs(struct pt_regs * regs)
regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
printf("MSR: %08lx EE: %01x PR: %01x FP:" printf("MSR: %08lx EE: %01x PR: %01x FP:"
" %01x ME: %01x IR/DR: %01x%01x\n", " %01x ME: %01x IR/DR: %01x%01x\n",
regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, regs->msr, regs->msr & MSR_EE ? 1 : 0,
regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0,
regs->msr&MSR_IR ? 1 : 0, regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0,
regs->msr & MSR_DR ? 1 : 0); regs->msr & MSR_DR ? 1 : 0);
printf("\n"); printf("\n");
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
if ((i % 8) == 0) if ((i % 8) == 0) {
{
printf("GPR%02d: ", i); printf("GPR%02d: ", i);
} }
printf("%08lX ", regs->gpr[i]); printf("%08lX ", regs->gpr[i]);
if ((i % 8) == 7) if ((i % 8) == 7) {
{
printf("\n"); printf("\n");
} }
} }
@ -203,7 +202,6 @@ SoftEmuException(struct pt_regs *regs)
panic("Software Emulation Exception"); panic("Software Emulation Exception");
} }
void void
UnknownException(struct pt_regs *regs) UnknownException(struct pt_regs *regs)
{ {
@ -216,36 +214,13 @@ UnknownException(struct pt_regs *regs)
_exception(0, regs); _exception(0, regs);
} }
/* Probe an address by reading. If not present, return -1, otherwise /*
* return 0. * Probe an address by reading.
* If not present, return -1,
* otherwise return 0.
*/ */
int int
addr_probe(uint *addr) addr_probe(uint *addr)
{ {
#if 0
int retval;
__asm__ __volatile__( \
"1: lwz %0,0(%1)\n" \
" eieio\n" \
" li %0,0\n" \
"2:\n" \
".section .fixup,\"ax\"\n" \
"3: li %0,-1\n" \
" b 2b\n" \
".section __ex_table,\"a\"\n" \
" .align 2\n" \
" .long 1b,3b\n" \
".text" \
: "=r" (retval) : "r"(addr));
return (retval);
#endif
return 0; return 0;
} }