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pm9261: compiles with the AT91 reworked scheme

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Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
This commit is contained in:
Asen Dimov 2011-07-26 04:48:41 +00:00 committed by Albert ARIBAUD
parent 65b0f87a80
commit f47316a8ba
4 changed files with 33 additions and 34 deletions
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9
board/ronetix/pm9261/led.c
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@ -24,17 +24,16 @@
*/ */
#include <common.h> #include <common.h>
#include <asm/arch/at91sam9261.h>
#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h> #include <asm/arch/gpio.h>
#include <asm/arch/io.h> #include <asm/io.h>
void coloured_LED_init(void) void coloured_LED_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Enable clock */ /* Enable clock */
writel(1 << AT91SAM9261_ID_PIOC, &pmc->pcer); writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
at91_set_pio_output(CONFIG_RED_LED, 1); at91_set_pio_output(CONFIG_RED_LED, 1);
at91_set_pio_output(CONFIG_GREEN_LED, 1); at91_set_pio_output(CONFIG_GREEN_LED, 1);

38
board/ronetix/pm9261/pm9261.c
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@ -26,17 +26,15 @@
#include <common.h> #include <common.h>
#include <asm/sizes.h> #include <asm/sizes.h>
#include <asm/arch/at91sam9261.h> #include <asm/io.h>
#include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h> #include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h> #include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_matrix.h> #include <asm/arch/at91_matrix.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/clk.h> #include <asm/arch/clk.h>
#include <asm/arch/at91_pio.h> #include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#include <lcd.h> #include <lcd.h>
#include <atmel_lcdc.h> #include <atmel_lcdc.h>
#include <dataflash.h> #include <dataflash.h>
@ -56,9 +54,9 @@ DECLARE_GLOBAL_DATA_PTR;
static void pm9261_nand_hw_init(void) static void pm9261_nand_hw_init(void)
{ {
unsigned long csa; unsigned long csa;
at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Enable CS3 */ /* Enable CS3 */
csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
@ -86,8 +84,8 @@ static void pm9261_nand_hw_init(void)
AT91_SMC_MODE_TDF_CYCLE(2), AT91_SMC_MODE_TDF_CYCLE(2),
&smc->cs[3].mode); &smc->cs[3].mode);
writel(1 << AT91SAM9261_ID_PIOA | writel(1 << ATMEL_ID_PIOA |
1 << AT91SAM9261_ID_PIOC, 1 << ATMEL_ID_PIOC,
&pmc->pcer); &pmc->pcer);
/* Configure RDY/BSY */ /* Configure RDY/BSY */
@ -105,8 +103,8 @@ static void pm9261_nand_hw_init(void)
#ifdef CONFIG_DRIVER_DM9000 #ifdef CONFIG_DRIVER_DM9000
static void pm9261_dm9000_hw_init(void) static void pm9261_dm9000_hw_init(void)
{ {
at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Configure SMC CS2 for DM9000 */ /* Configure SMC CS2 for DM9000 */
writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
@ -127,7 +125,7 @@ static void pm9261_dm9000_hw_init(void)
&smc->cs[2].mode); &smc->cs[2].mode);
/* Configure Interrupt pin as input, no pull-up */ /* Configure Interrupt pin as input, no pull-up */
writel(1 << AT91SAM9261_ID_PIOA, &pmc->pcer); writel(1 << ATMEL_ID_PIOA, &pmc->pcer);
at91_set_pio_input(AT91_PIO_PORTA, 24, 0); at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
} }
#endif #endif
@ -147,7 +145,7 @@ vidinfo_t panel_info = {
vl_vsync_len: 1, vl_vsync_len: 1,
vl_upper_margin:1, vl_upper_margin:1,
vl_lower_margin:0, vl_lower_margin:0,
mmio: AT91SAM9261_LCDC_BASE, mmio: ATMEL_BASE_LCDC,
}; };
void lcd_enable(void) void lcd_enable(void)
@ -162,7 +160,7 @@ void lcd_disable(void)
static void pm9261_lcd_hw_init(void) static void pm9261_lcd_hw_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */
at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */
@ -189,7 +187,7 @@ static void pm9261_lcd_hw_init(void)
writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */ writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */
gd->fb_base = AT91SAM9261_SRAM_BASE; gd->fb_base = ATMEL_BASE_SRAM;
} }
#ifdef CONFIG_LCD_INFO #ifdef CONFIG_LCD_INFO
@ -241,13 +239,13 @@ void lcd_show_board_info(void)
int board_init(void) int board_init(void)
{ {
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/* Enable Ctrlc */ /* Enable Ctrlc */
console_init_f(); console_init_f();
writel(1 << AT91SAM9261_ID_PIOA | writel(1 << ATMEL_ID_PIOA |
1 << AT91SAM9261_ID_PIOC, 1 << ATMEL_ID_PIOC,
&pmc->pcer); &pmc->pcer);
/* arch number of PM9261-Board */ /* arch number of PM9261-Board */
@ -256,7 +254,7 @@ int board_init(void)
/* adress of boot parameters */ /* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
at91_serial_hw_init(); at91_seriald_hw_init();
#ifdef CONFIG_CMD_NAND #ifdef CONFIG_CMD_NAND
pm9261_nand_hw_init(); pm9261_nand_hw_init();
#endif #endif

2
boards.cfg
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@ -122,7 +122,7 @@ meesc arm arm926ejs meesc esd
meesc_dataflash arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_DATAFLASH meesc_dataflash arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_DATAFLASH
otc570 arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_NANDFLASH otc570 arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_NANDFLASH
otc570_dataflash arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_DATAFLASH otc570_dataflash arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_DATAFLASH
pm9261 arm arm926ejs - ronetix at91 pm9261 arm arm926ejs pm9261 ronetix at91 pm9261:AT91SAM9261
pm9263 arm arm926ejs - ronetix at91 pm9263 arm arm926ejs - ronetix at91
da830evm arm arm926ejs da8xxevm davinci davinci da830evm arm arm926ejs da8xxevm davinci davinci
da850evm arm arm926ejs da8xxevm davinci davinci da850evm arm arm926ejs da8xxevm davinci davinci

18
include/configs/pm9261.h
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@ -28,25 +28,29 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
/*
* SoC must be defined first, before hardware.h is included.
* In this case SoC is defined in boards.cfg.
*/
#include <asm/hardware.h>
/* ARM asynchronous clock */ /* ARM asynchronous clock */
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO
#define MASTER_PLL_DIV 15 #define MASTER_PLL_DIV 15
#define MASTER_PLL_MUL 162 #define MASTER_PLL_MUL 162
#define MAIN_PLL_DIV 2 #define MAIN_PLL_DIV 2
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
#define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */
#define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_SYS_TEXT_BASE 0 #define CONFIG_SYS_TEXT_BASE 0
#define CONFIG_AT91FAMILY
/* clocks */ /* clocks */
/* CKGR_MOR - enable main osc. */ /* CKGR_MOR - enable main osc. */
@ -160,10 +164,8 @@
*/ */
#define CONFIG_AT91_GPIO 1 #define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1 #define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
#undef CONFIG_USART1 #define CONFIG_USART_ID ATMEL_ID_SYS
#undef CONFIG_USART2
#define CONFIG_USART3 1 /* USART 3 is DBGU */
/* LCD */ /* LCD */
#define CONFIG_LCD 1 #define CONFIG_LCD 1