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ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup

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Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2008-10-13 15:15:31 +02:00
parent 43cbce69d4
commit f4d14c5550
1 changed files with 12 additions and 0 deletions
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12
board/amcc/canyonlands/bootstrap.c
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@ -40,6 +40,8 @@
static char *config_labels[] = { static char *config_labels[] = {
"CPU: 600 PLB: 200 OPB: 100 EBC: 100", "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
"CPU: 800 PLB: 200 OPB: 100 EBC: 100", "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
"CPU:1000 PLB: 200 OPB: 100 EBC: 100",
"CPU:1066 PLB: 266 OPB: 88 EBC: 88",
NULL NULL
}; };
@ -54,6 +56,16 @@ static u8 boot_configs[][17] = {
0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08, 0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}, },
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{ {
0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0