minix/u-boot
1
0
Fork 0
mirror of https://github.com/Stichting-MINIX-Research-Foundation/u-boot.git synced 2025-09-10 04:26:19 -04:00
Code Issues Packages Projects Releases Wiki Activity

powerpc/83xx/km: add support for 8321 based tuge1 board

Browse Source 
This board is similar to our tuxx1 target. But on this board there
is only one application specific chip select configured.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Holger Brunck 2011-12-14 16:21:45 +01:00 committed by Kim Phillips
parent 5f2a44d5ea
commit f5a474bd7a
3 changed files with 21 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
MAINTAINERS
View File

@ -440,6 +440,7 @@ Heiko Schocher <hs@denx.de>
ve8313 MPC8313 ve8313 MPC8313
Holger Brunck <holger.brunck@keymile.com> Holger Brunck <holger.brunck@keymile.com>
tuge1 MPC8321
tuxx1 MPC8321 tuxx1 MPC8321
Peter De Schrijver <p2@mind.be> Peter De Schrijver <p2@mind.be>

1
boards.cfg
View File

@ -593,6 +593,7 @@ MPC837XERDB powerpc mpc83xx mpc837xerdb freesca
kmeter1 powerpc mpc83xx km83xx keymile kmeter1 powerpc mpc83xx km83xx keymile
kmsupx5 powerpc mpc83xx km83xx keymile kmsupx5 powerpc mpc83xx km83xx keymile
suvd3 powerpc mpc83xx km83xx keymile suvd3 powerpc mpc83xx km83xx keymile
tuge1 powerpc mpc83xx km83xx keymile - tuxx1:KM_DISABLE_APP2
tuxx1 powerpc mpc83xx km83xx keymile tuxx1 powerpc mpc83xx km83xx keymile
MERGERBOX powerpc mpc83xx mergerbox matrix_vision MERGERBOX powerpc mpc83xx mergerbox matrix_vision
MVBLM7 powerpc mpc83xx mvblm7 matrix_vision MVBLM7 powerpc mpc83xx mvblm7 matrix_vision

24
include/configs/tuxx1.h
View File

@ -27,9 +27,13 @@
/* /*
* High Level Configuration Options * High Level Configuration Options
*/ */
#define CONFIG_TUXXX /* TUXX1 board specific */ #define CONFIG_TUXXX /* TUXX1 board (tuxa1/tuda1) specific */
#define CONFIG_HOSTNAME tuxx1 #define CONFIG_HOSTNAME tuxx1
#ifdef CONFIG_KM_DISABLE_APP2
#define CONFIG_KM_BOARD_NAME "tuge1"
#else
#define CONFIG_KM_BOARD_NAME "tuxx1" #define CONFIG_KM_BOARD_NAME "tuxx1"
#endif
#define CONFIG_SYS_TEXT_BASE 0xF0000000 #define CONFIG_SYS_TEXT_BASE 0xF0000000
@ -38,16 +42,18 @@
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */ #define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */ #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#ifndef CONFIG_KM_DISABLE_APP2
#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */ #define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
#define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */ #define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
#endif
/* /*
* Init Local Bus Memory Controller: * Init Local Bus Memory Controller:
* *
* Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 TUGE1
* ---- --- ------- ------ ----- --------------------- * ---- --- ------- ------ ----- ----------------------------
* 2 Local GPCM 8 bit 256MB PAXG LPXF * 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI
* 3 Local GPCM 8 bit 256MB PINC3 PINC2 * 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused
* *
*/ */
@ -71,6 +77,7 @@
OR_GPCM_TRLX_SET | \ OR_GPCM_TRLX_SET | \
OR_GPCM_EHTR_CLEAR | \ OR_GPCM_EHTR_CLEAR | \
OR_GPCM_EAD) OR_GPCM_EAD)
#ifndef CONFIG_KM_DISABLE_APP2
/* /*
* Configuration for C3 on the local bus * Configuration for C3 on the local bus
*/ */
@ -94,6 +101,7 @@
#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
0x0000c000 | \ 0x0000c000 | \
MxMR_WLFx_2X) MxMR_WLFx_2X)
#endif
/* /*
* MMU Setup * MMU Setup
@ -113,6 +121,11 @@
BATL_GUARDEDSTORAGE) BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
#ifdef CONFIG_KM_DISABLE_APP2
#define CONFIG_SYS_IBAT6L (0)
#define CONFIG_SYS_IBAT6U (0)
#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
#else
/* APP2: icache cacheable, but dcache-inhibit and guarded */ /* APP2: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \ #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
BATL_PP_RW | \ BATL_PP_RW | \
@ -125,6 +138,7 @@
BATL_PP_RW | \ BATL_PP_RW | \
BATL_CACHEINHIBIT | \ BATL_CACHEINHIBIT | \
BATL_GUARDEDSTORAGE) BATL_GUARDEDSTORAGE)
#endif
#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
#define CONFIG_SYS_IBAT7L (0) #define CONFIG_SYS_IBAT7L (0)