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ppc: Move mpc512x clocks to arch_global_data

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Move ips_clk and csb_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2012-12-13 20:48:54 +00:00 committed by Tom Rini
parent b28774966c
commit fefb098b18
8 changed files with 19 additions and 16 deletions
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2
arch/powerpc/cpu/mpc512x/cpu.c
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@ -68,7 +68,7 @@ int checkcpu (void)
} }
printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n", printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n",
strmhz(buf1, clock), strmhz(buf1, clock),
strmhz(buf2, gd->csb_clk), strmhz(buf2, gd->arch.csb_clk),
gd->reset_status & 0xffff); gd->reset_status & 0xffff);
return 0; return 0;
} }

2
arch/powerpc/cpu/mpc512x/i2c.c
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@ -250,7 +250,7 @@ static int mpc_get_fdr (int speed)
{126, 128} {126, 128}
}; };
ips = gd->ips_clk; ips = gd->arch.ips_clk;
for (i = 7; i >= 0; i--) { for (i = 7; i >= 0; i--) {
for (j = 7; j >= 0; j--) { for (j = 7; j >= 0; j--) {
scl = 2 * (scltap[j].scl2tap + scl = 2 * (scltap[j].scl2tap +

2
arch/powerpc/cpu/mpc512x/ide.c
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@ -100,7 +100,7 @@ int ide_preinit (void)
ide_set_reset(0); ide_set_reset(0);
/* Init timings : we use PIO mode 0 timings */ /* Init timings : we use PIO mode 0 timings */
t = 1000000000 / gd->ips_clk; /* period in ns */ t = 1000000000 / gd->arch.ips_clk; /* period in ns */
cfg.bytes.field1 = 3; cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3; cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t; cfg.bytes.field3 = (pio_specs.t1 + t) / t;

2
arch/powerpc/cpu/mpc512x/serial.c
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@ -140,7 +140,7 @@ void serial_setbrg_dev(unsigned int idx)
} }
/* calculate divisor for setting PSC CTUR and CTLR registers */ /* calculate divisor for setting PSC CTUR and CTLR registers */
baseclk = (gd->ips_clk + 8) / 16; baseclk = (gd->arch.ips_clk + 8) / 16;
div = (baseclk + (baudrate / 2)) / baudrate; div = (baseclk + (baudrate / 2)) / baudrate;
out_8(&psc->ctur, (div >> 8) & 0xff); out_8(&psc->ctur, (div >> 8) & 0xff);

15
arch/powerpc/cpu/mpc512x/speed.c
View File

@ -113,9 +113,9 @@ int get_clocks (void)
pci_clk = 333333; pci_clk = 333333;
} }
gd->ips_clk = ips_clk; gd->arch.ips_clk = ips_clk;
gd->pci_clk = pci_clk; gd->pci_clk = pci_clk;
gd->csb_clk = csb_clk; gd->arch.csb_clk = csb_clk;
gd->cpu_clk = core_clk; gd->cpu_clk = core_clk;
gd->bus_clk = csb_clk; gd->bus_clk = csb_clk;
return 0; return 0;
@ -128,7 +128,7 @@ int get_clocks (void)
*********************************************/ *********************************************/
ulong get_bus_freq (ulong dummy) ulong get_bus_freq (ulong dummy)
{ {
return gd->csb_clk; return gd->arch.csb_clk;
} }
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
@ -137,10 +137,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
printf("Clock configuration:\n"); printf("Clock configuration:\n");
printf(" CPU: %-4s MHz\n", strmhz(buf, gd->cpu_clk)); printf(" CPU: %-4s MHz\n", strmhz(buf, gd->cpu_clk));
printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); printf(" Coherent System Bus: %-4s MHz\n",
printf(" IPS Bus: %-4s MHz\n", strmhz(buf, gd->ips_clk)); strmhz(buf, gd->arch.csb_clk));
printf(" IPS Bus: %-4s MHz\n",
strmhz(buf, gd->arch.ips_clk));
printf(" PCI: %-4s MHz\n", strmhz(buf, gd->pci_clk)); printf(" PCI: %-4s MHz\n", strmhz(buf, gd->pci_clk));
printf(" DDR: %-4s MHz\n", strmhz(buf, 2*gd->csb_clk)); printf(" DDR: %-4s MHz\n",
strmhz(buf, 2 * gd->arch.csb_clk));
return 0; return 0;
} }

8
arch/powerpc/include/asm/global_data.h
View File

@ -97,6 +97,10 @@ struct arch_global_data {
#if defined(CONFIG_MPC5xxx) #if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk; unsigned long ipb_clk;
#endif #endif
#if defined(CONFIG_MPC512X)
u32 ips_clk;
u32 csb_clk;
#endif /* CONFIG_MPC512X */
}; };
/* /*
@ -119,10 +123,6 @@ typedef struct global_data {
#if defined(CONFIG_FSL_ESDHC) #if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk; u32 sdhc_clk;
#endif #endif
#if defined(CONFIG_MPC512X)
u32 ips_clk;
u32 csb_clk;
#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC8220) #if defined(CONFIG_MPC8220)
unsigned long bExtUart; unsigned long bExtUart;
unsigned long inp_clk; unsigned long inp_clk;

2
arch/powerpc/lib/board.c
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@ -586,7 +586,7 @@ void board_init_f(ulong bootflag)
bd->bi_vco = gd->arch.vco_out; bd->bi_vco = gd->arch.vco_out;
#endif /* CONFIG_CPM2 */ #endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC512X) #if defined(CONFIG_MPC512X)
bd->bi_ipsfreq = gd->ips_clk; bd->bi_ipsfreq = gd->arch.ips_clk;
#endif /* CONFIG_MPC512X */ #endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC5xxx) #if defined(CONFIG_MPC5xxx)
bd->bi_ipbfreq = gd->arch.ipb_clk; bd->bi_ipbfreq = gd->arch.ipb_clk;

2
drivers/net/mpc512x_fec.c
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@ -304,7 +304,7 @@ int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis)
* and do not drop the Preamble. * and do not drop the Preamble.
*/ */
out_be32(&fec->eth->mii_speed, out_be32(&fec->eth->mii_speed,
(((gd->ips_clk / 1000000) / 5) + 1) << 1); (((gd->arch.ips_clk / 1000000) / 5) + 1) << 1);
/* /*
* Reset PHY, then delay 300ns * Reset PHY, then delay 300ns