Haiying Wang 7211fbfa18 drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs ...

Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

2009-06-12 17:16:59 -05:00

..

4xx_pci.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

4xx_pcie.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

5xx_immap.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

8xx_immap.h

…

atomic.h

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bitops.h

PPC: Added fls, fls64, __ilog2_u64, and ffs64 to bitops

2008-07-01 21:47:12 +02:00

byteorder.h

…

cache.h

85xx: Add basic e500mc core support

2008-10-24 15:10:47 -05:00

config.h

MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default

2009-02-23 22:50:05 +01:00

cpm_85xx.h

…

cpm_8260.h

POWERPC 82xx: add the SCC as an HDLC controller

2009-01-24 00:42:04 +01:00

e300.h

powerpc: Move duplicated BAT defines to mmu.h

2009-02-10 00:27:40 +01:00

errno.h

…

fsl_ddr_dimm_params.h

fsl-ddr: add the DDR3 SPD infrastructure

2009-03-30 13:33:50 -05:00

fsl_ddr_sdram.h

fsl-ddr: add the DDR3 SPD infrastructure

2009-03-30 13:33:50 -05:00

fsl_i2c.h

…

fsl_law.h

mpc85xx: Add support for the P2020

2009-02-16 18:05:55 -06:00

fsl_lbc.h

83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x

2009-06-12 20:47:17 +02:00

fsl_pci.h

fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs

2009-04-04 10:21:30 -05:00

fsl_serdes.h

mpc83xx: serdes: add forgotten shifts for rfcks

2008-10-21 18:34:01 -05:00

global_data.h

83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x

2009-06-12 20:47:17 +02:00

gpio.h

ppc4xx: Add AMCC Canyonlands support (460EX) (3/3)

2008-03-15 07:28:05 +01:00

immap_83xx.h

mpc83xx: USB: Reorganized its support

2009-06-12 20:47:17 +02:00

immap_85xx.h

85xx: Add QE clk support

2009-06-12 17:16:59 -05:00

immap_86xx.h

86xx: Update Global Utilities structure

2009-02-16 18:05:57 -06:00

immap_512x.h

mcp512x: Add macros for SCFR LPC divisor access

2009-06-12 20:47:19 +02:00

immap_8220.h

…

immap_8260.h

…

immap_qe.h

drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs

2009-06-12 17:16:59 -05:00

interrupt.h

ppc4xx: CPU PPC440x5 on Virtex5 FX

2008-07-18 12:30:50 +02:00

io.h

ppc: Use addrmap in virt_to_phys and map_physmem.

2008-12-19 18:20:08 -06:00

iopin_8xx.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

iopin_85xx.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

iopin_8260.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

m8260_pci.h

…

mc146818rtc.h

…

mmu.h

mpc86xx: Add support to populate addr map based on BATs

2009-02-10 00:29:49 +01:00

mp.h

Update CHANGELOG, coding style cleanup.

2009-04-05 00:27:57 +02:00

mpc8xxx_spi.h

83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x

2009-06-12 20:47:17 +02:00

mpc8349_pci.h

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pci_io.h

…

pnp.h

…

posix_types.h

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ppc4xx-ebc.h

ppc4xx: Correctly setup ranges property in ebc node

2008-10-21 17:35:02 +02:00

ppc4xx-isram.h

ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs

2008-11-21 10:52:33 +01:00

ppc4xx-sdram.h

ppc4xx: Autocalibration can set RDCC to over aggressive value.

2009-02-12 06:08:07 +01:00

ppc4xx-uic.h

ppc4xx: CPU PPC440x5 on Virtex5 FX

2008-07-18 12:30:50 +02:00

processor.h

85xx: Added MPC8535/E identifiers

2009-06-12 17:16:26 -05:00

ptrace.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

residual.h

…

sigcontext.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

signal.h

…

status_led.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

string.h

…

types.h

Replace __attribute references with __attribute__

2009-04-28 01:01:39 +02:00

u-boot.h

83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx

2009-06-12 20:47:17 +02:00

unaligned.h

Add LZO decompressor support

2009-03-20 22:39:15 +01:00

xilinx_irq.h

ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 support

2008-07-18 12:31:25 +02:00