Lokesh Vutla 753bae8c5d OMAP5: DPLL core lock for OMAP5432 ...

No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

2012-07-07 14:07:24 +02:00

..

clocks.h

OMAP5: DPLL core lock for OMAP5432

2012-07-07 14:07:24 +02:00

cpu.h

OMAP3+: reset: Create a common reset layer.

2012-05-15 08:31:25 +02:00

gpio.h

…

i2c.h

…

mmc_host_def.h

ARM:OMAP+:MMC: Add parameters to MMC init

2012-05-15 08:31:22 +02:00

mux_omap5.h

omap4+: Avoid using __attribute__ ((__packed__))

2012-05-15 08:31:26 +02:00

omap.h

OMAP5: Configure the io settings for omap5432 uevm board

2012-07-07 14:07:23 +02:00

sys_proto.h

OMAP4/5: Make the silicon revision variable common.

2012-05-15 08:31:24 +02:00