Kumar Gala 79e4e6480b powerpc/8xxx: Enabled hwconfig for memory interleaving ...

Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is

    setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"

The mode values for memory controller interleaving are
    cacheline
    page
    bank
    superbank

The mode values for bank interleaving are
    cs0_cs1
    cs2_cs3
    cs0_cs1_and_cs2_cs3
    cs0_cs1_cs2_cs3

Signed-off-by: York Sun <yorksun@freescale.com>

2010-07-26 13:16:08 -05:00

..

common_timing_params.h

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

ctrl_regs.c

fsl-ddr: Add extra cycle to turnaround times

2010-04-26 22:37:53 -05:00

ddr1_dimm_params.c

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

ddr2_dimm_params.c

Enabled support for Rev 1.3 SPD for DDR2 DIMMs

2010-05-12 04:54:30 -05:00

ddr3_dimm_params.c

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

ddr.h

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

lc_common_dimm_params.c

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

main.c

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

Makefile

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00

options.c

powerpc/8xxx: Enabled hwconfig for memory interleaving

2010-07-26 13:16:08 -05:00

util.c

Move arch/ppc to arch/powerpc

2010-04-21 23:42:38 +02:00