York Sun 856e4b0d7f powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3
When DDR data rate is higher than 1200MT/s or controller interleaving is
enabled, additional cycle for write-to-read turnaround is needed to satisfy
dynamic ODT timing.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-10 23:40:02 -06:00
..
2011-01-09 18:06:50 +01:00