Gururaja Hebbar K R e8f1207bbf Correct ARM Versatile Timer Initialization ...

- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
   -- Timer Value Register @ TIMER Base + 4 is Read-only.
   -- Prescale Value (Bits 3-2 of TIMER Control register)
	can only be one of 00,01,10. 11 is undefined.
   -- CFG_HZ for Versatile board is set to
	#define CFG_HZ		(1000000 / 256)
	So Prescale bits is set to indicate
	- 8 Stages of Prescale, Clock divided by 256
 - The Timer Control Register has one Undefined/Shouldn't Use Bit
   So we should do read/modify/write Operation

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>

2008-08-25 13:00:03 +02:00

..

at91

at91: move arch-at91sam9 to arch-at91

2008-08-12 18:41:42 +02:00

davinci

ARM DaVinci: Removed redundant NAND initialization code.

2008-08-25 11:12:44 +02:00

omap

Move "ar" flags to config.mk to allow for silent "make -s"

2006-10-09 01:02:05 +02:00

versatile

Correct ARM Versatile Timer Initialization

2008-08-25 13:00:03 +02:00

config.mk

Update ARM Integrator boards:

2005-10-04 23:10:28 +02:00

cpu.c

ARM: Fix for broken compilation when defining CONFIG_CMD_ELF

2008-07-13 15:05:11 +02:00

cpuinfo.c

Remove duplicate defines for ARRAY_SIZE

2008-02-14 00:43:02 +01:00

interrupts.c

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

Makefile

Move "ar" flags to config.mk to allow for silent "make -s"

2006-10-09 01:02:05 +02:00

start.S

Big white-space cleanup.

2008-05-21 00:14:08 +02:00