Tom Rini a74f0c7cb5 am33xx: Correct and clean up ddr_regs struct ...

The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported).  Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove.  Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there.  Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.

Signed-off-by: Tom Rini <trini@ti.com>

2012-09-01 14:58:13 +02:00

..

cpu

am33xx: Correct and clean up ddr_regs struct

2012-09-01 14:58:13 +02:00

dts

tegra: fdt: Add keyboard controller definition

2012-05-15 08:31:40 +02:00

include/asm

am33xx: Correct and clean up ddr_regs struct

2012-09-01 14:58:13 +02:00

lib

ARM: lib: Remove CONFIG_ARCH_CPU_INIT dependency

2012-07-20 14:24:08 +02:00

config.mk

Makefile: Add a 'checkthumb' rule

2012-05-15 08:31:26 +02:00