u-boot

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History

Peter Tyser a1c8a71926 86xx: Update CPU info output on bootup

- Update style of 86xx CPU information on boot to more closely
  match 85xx boards
- Fix detection of 8641/8641D
- Use strmhz() to display frequencies
- Display L1 information
- Display L2 cache size
- Fixed CPU/SVR version output

== Before ==
Freescale PowerPC
CPU:
    Core: E600 Core 0, Version: 0.2, (0x80040202)
    System: Unknown, Version: 2.1, (0x80900121)
    Clocks: CPU:1066 MHz, MPX: 533 MHz, DDR: 266 MHz, LBC: 133 MHz
    L2: Enabled
Board: X-ES XPedite5170 3U VPX SBC

== After ==
CPU:   8641D, Version: 2.1, (0x80900121)
Core:  E600 Core 0, Version: 2.2, (0x80040202)
Clock Configuration:
       CPU:1066.667 MHz, MPX:533.333 MHz
       DDR:266.667 MHz (533.333 MT/s data rate), LBC:133.333 MHz
L1:    D-cache 32 KB enabled
       I-cache 32 KB enabled
L2:    512 KB enabled
Board: X-ES XPedite5170 3U VPX SBC

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

2009-02-16 18:05:57 -06:00

cache.S

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

config.mk

PPC: Use r2 instead of r29 as global data pointer

2008-02-14 22:43:22 +01:00

cpu_init.c

mpc86xx: Add support to populate addr map based on BATs

2009-02-10 00:29:49 +01:00

cpu.c

86xx: Update CPU info output on bootup