Haiying Wang 7a1ac419fa Enable L2 cache for MPC8568MDS board ...

The L2 cache size is 512KB for 8568, print out the correct informaiton.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

2007-08-29 00:11:44 -05:00

..

commproc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

config.mk

Patches by Martin Krause, 22 Mar 2005:

2005-03-27 23:41:39 +00:00

cpu_init.c

Enable L2 cache for MPC8568MDS board

2007-08-29 00:11:44 -05:00

cpu.c

Add support for UEC to 8568

2007-08-14 01:47:44 -05:00

ether_fcc.c

cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.

2007-07-10 10:27:39 -05:00

interrupts.c

85xx start.S cleanup and exception support

2007-08-14 01:34:21 -05:00

Makefile

Add support for UEC to 8568

2007-08-14 01:47:44 -05:00

pci.c

85xxCDS: Add make targets for legacy systems.

2007-08-14 01:51:39 -05:00

qe_io.c

Add support for UEC to 8568

2007-08-14 01:47:44 -05:00

resetvec.S

* Patches by Xianghua Xiao, 15 Oct 2003:

2003-10-15 23:53:47 +00:00

serial_scc.c

GCC-4.x fixes: clean up global data pointer initialization for all boards.

2006-03-31 18:32:53 +02:00

spd_sdram.c

Empirically set cpo and clk_adjust for mpc85xx DDR2 support

2007-08-14 01:45:51 -05:00

speed.c

Reworked 85xx speed detection code

2007-04-23 19:58:28 -05:00

start.S

Use an absolute address when jumping out of 4k boot page

2007-08-14 01:45:09 -05:00

traps.c

85xx start.S cleanup and exception support

2007-08-14 01:34:21 -05:00