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arm:caching mark normal memory cacheable during identity mapping.

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Change-Id: I7cd8da168744a3f32276803e99e8af0fea772574
This commit is contained in:
Kees Jongenburger 2013-09-25 10:38:54 +02:00
parent d77debb5b7
commit 34b517ab12
1 changed files with 7 additions and 2 deletions
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9
kernel/arch/earm/pg_utils.c
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@ -157,10 +157,15 @@ void pg_identity(kinfo_t *cbi)
for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) { for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
u32_t flags = ARM_VM_SECTION u32_t flags = ARM_VM_SECTION
| ARM_VM_SECTION_USER | ARM_VM_SECTION_USER
| ARM_VM_SECTION_DEVICE
| ARM_VM_SECTION_DOMAIN; | ARM_VM_SECTION_DOMAIN;
phys = i * ARM_SECTION_SIZE; phys = i * ARM_SECTION_SIZE;
pagedir[i] = phys | flags; /* mark mormal memory as cacheable. TODO: fix hard coded values */
if (phys >= PHYS_MEM_BEGIN && phys <= PHYS_MEM_END){
pagedir[i] = phys | flags | ARM_VM_SECTION_CACHED;
} else {
pagedir[i] = phys | flags | ARM_VM_SECTION_DEVICE;
}
} }
} }