0a6a1f1d05
This brings our tree to NetBSD 7.0, as found on -current on the 10-10-2015. This updates: - LLVM to 3.6.1 - GCC to GCC 5.1 - Replace minix/commands/zdump with usr.bin/zdump - external/bsd/libelf has moved to /external/bsd/elftoolchain/ - Import ctwm - Drop sprintf from libminc Change-Id: I149836ac18e9326be9353958bab9b266efb056f0
101 lines
2.7 KiB
ArmAsm
101 lines
2.7 KiB
ArmAsm
/* $NetBSD: atomic_cas_up.S,v 1.7 2014/03/04 03:36:24 matt Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Steve C. Woodford.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/ras.h>
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#include <machine/asm.h>
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ENTRY(_atomic_cas_up)
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.hidden _C_LABEL(_atomic_cas_up)
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mov r3, r0
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.align 0
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RAS_START_ASM_HIDDEN(_atomic_cas)
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ldr r0, [r3]
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cmp r0, r1
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#if defined(__thumb__)
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beq 1f
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#else
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streq r2, [r3]
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#endif
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.align 0
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RAS_END_ASM_HIDDEN(_atomic_cas)
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1: RET
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END(_atomic_cas_up)
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#if defined(__HAVE_ASM_ATOMIC_CAS_64_UP)
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ARM_ENTRY(_atomic_cas_64_up)
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push {r4-r5}
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mov ip, r0
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ldrd r4, r5, [sp, #8]
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.align 0
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RAS_START_ASM_HIDDEN(_atomic_cas_64)
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ldrd r0, r1, [ip]
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cmp r0, r2
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cmpeq r1, r3
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strdeq r4, r5, [ip]
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.align 0
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RAS_END_ASM_HIDDEN(_atomic_cas_64)
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1: pop {r4-r5}
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bx lr
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END(_atomic_cas_64_up)
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#endif /* __HAVE_ASM_ATOMIC_64_UP */
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ENTRY(_atomic_cas_16_up)
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mov r3, r0
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.align 0
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RAS_START_ASM_HIDDEN(_atomic_cas_16)
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ldrh r0, [r3]
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cmp r0, r1
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#if defined(__thumb__)
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beq 1f
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#else
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strheq r2, [r3]
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#endif
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.align 0
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RAS_END_ASM_HIDDEN(_atomic_cas_16)
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1: RET
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END(_atomic_cas_16_up)
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ENTRY(_atomic_cas_8_up)
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mov r3, r0
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.align 0
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RAS_START_ASM_HIDDEN(_atomic_cas_8)
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ldrb r0, [r3]
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cmp r0, r1
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#if defined(__thumb__)
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beq 1f
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#else
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strbeq r2, [r3]
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#endif
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.align 0
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RAS_END_ASM_HIDDEN(_atomic_cas_8)
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1: RET
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END(_atomic_cas_8_up)
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