0a6a1f1d05
This brings our tree to NetBSD 7.0, as found on -current on the 10-10-2015. This updates: - LLVM to 3.6.1 - GCC to GCC 5.1 - Replace minix/commands/zdump with usr.bin/zdump - external/bsd/libelf has moved to /external/bsd/elftoolchain/ - Import ctwm - Drop sprintf from libminc Change-Id: I149836ac18e9326be9353958bab9b266efb056f0
45 lines
1.1 KiB
Makefile
45 lines
1.1 KiB
Makefile
# $NetBSD: Makefile,v 1.9 2015/01/29 20:41:36 joerg Exp $
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LIB= LLVMSparcCodeGen
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.include <bsd.init.mk>
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.PATH: ${LLVM_SRCDIR}/lib/Target/Sparc
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SRCS+= DelaySlotFiller.cpp \
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SparcAsmPrinter.cpp \
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SparcInstrInfo.cpp \
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SparcISelDAGToDAG.cpp \
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SparcISelLowering.cpp \
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SparcFrameLowering.cpp \
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SparcMCInstLower.cpp \
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SparcMachineFunctionInfo.cpp \
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SparcRegisterInfo.cpp \
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SparcSubtarget.cpp \
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SparcTargetMachine.cpp \
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SparcTargetObjectFile.cpp \
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SparcSelectionDAGInfo.cpp
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TABLEGEN_SRC= Sparc.td
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TABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/Sparc
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TABLEGEN_OUTPUT= \
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SparcGenDAGISel.inc|-gen-dag-isel \
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SparcGenAsmMatcher.inc|-gen-asm-matcher \
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SparcGenAsmWriter.inc|-gen-asm-writer \
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SparcGenCallingConv.inc|-gen-callingconv \
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SparcGenCodeEmitter.inc|-gen-emitter \
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SparcGenDisassemblerTables.inc|-gen-disassembler \
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SparcGenInstrInfo.inc|-gen-instr-info \
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SparcGenMCCodeEmitter.inc|-gen-emitter \
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SparcGenRegisterInfo.inc|-gen-register-info \
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SparcGenSubtargetInfo.inc|-gen-subtarget
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.include "${.PARSEDIR}/../../tablegen.mk"
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.if defined(HOSTLIB)
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.include <bsd.hostlib.mk>
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.else
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.include <bsd.lib.mk>
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.endif
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