1cd76c7513
. primary purpose is to synchronize with <ieeefp.h> which expects a fp_prec from sys/arch/x86/include/ieeefp.h
116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
/* $NetBSD: i82489var.h,v 1.14 2011/06/12 03:35:50 rmind Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Frank van der Linden.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _X86_I82489VAR_H_
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#define _X86_I82489VAR_H_
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/*
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* Software definitions belonging to Local APIC driver.
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*/
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static __inline uint32_t i82489_readreg(int);
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static __inline void i82489_writereg(int, uint32_t);
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#ifdef _KERNEL
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extern volatile uint32_t local_apic[];
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extern volatile uint32_t lapic_tpr;
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#endif
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static __inline uint32_t
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i82489_readreg(int reg)
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{
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return *((volatile uint32_t *)(((volatile uint8_t *)local_apic)
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+ reg));
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}
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static __inline void
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i82489_writereg(int reg, uint32_t val)
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{
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*((volatile uint32_t *)(((volatile uint8_t *)local_apic) + reg)) = val;
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}
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#define lapic_cpu_number() (i82489_readreg(LAPIC_ID) >> LAPIC_ID_SHIFT)
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/*
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* "spurious interrupt vector"; vector used by interrupt which was
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* aborted because the CPU masked it after it happened but before it
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* was delivered.. "Oh, sorry, i caught you at a bad time".
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* Low-order 4 bits must be all ones.
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*/
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extern void Xintrspurious(void);
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#define LAPIC_SPURIOUS_VECTOR 0xef
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/*
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* Vectors used for inter-processor interrupts.
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*/
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extern void Xintr_lapic_ipi(void);
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extern void Xrecurse_lapic_ipi(void);
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extern void Xresume_lapic_ipi(void);
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#define LAPIC_IPI_VECTOR 0xe0
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extern void Xintr_lapic_tlb(void);
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#define LAPIC_TLB_VECTOR 0xe1
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/*
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* Vector used for local apic timer interrupts.
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*/
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extern void Xintr_lapic_ltimer(void);
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extern void Xresume_lapic_ltimer(void);
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extern void Xrecurse_lapic_ltimer(void);
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#define LAPIC_TIMER_VECTOR 0xc0
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/*
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* 'pin numbers' for local APIC
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*/
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#define LAPIC_PIN_TIMER 0
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#define LAPIC_PIN_PCINT 2
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#define LAPIC_PIN_LVINT0 3
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#define LAPIC_PIN_LVINT1 4
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#define LAPIC_PIN_LVERR 5
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extern void Xintr_lapic0(void);
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extern void Xintr_lapic2(void);
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extern void Xintr_lapic3(void);
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extern void Xintr_lapic4(void);
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extern void Xintr_lapic5(void);
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struct cpu_info;
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extern void lapic_boot_init(paddr_t);
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extern void lapic_set_lvt(void);
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extern void lapic_enable(void);
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extern void lapic_calibrate_timer(struct cpu_info *ci);
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extern void lapic_initclocks(void);
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#endif
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