2d72cbec41
. add cpufeature detection of both . use it for both ipc and kernelcall traps, using a register for call number . SYSENTER/SYSCALL does not save any context, therefore userland has to save it . to accomodate multiple kernel entry/exit types, the entry type is recorded in the process struct. hitherto all types were interrupt (soft int, exception, hard int); now SYSENTER/SYSCALL is new, with the difference that context is not fully restored from proc struct when running the process again. this can't be done as some information is missing. . complication: cases in which the kernel has to fully change process context (i.e. sigreturn). in that case the exit type is changed from SYSENTER/SYSEXIT to soft-int (i.e. iret) and context is fully restored from the proc struct. this does mean the PC and SP must change, as the sysenter/sysexit userland code will otherwise try to restore its own context. this is true in the sigreturn case. . override all usage by setting libc_ipc=1
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
#include <sys/types.h>
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#include <stdint.h>
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#include <minix/minlib.h>
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#include <minix/cpufeature.h>
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#include <machine/vm.h>
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#include <string.h>
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int _cpufeature(int cpufeature)
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{
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u32_t eax, ebx, ecx, edx;
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u32_t ef_eax = 0, ef_ebx = 0, ef_ecx = 0, ef_edx = 0;
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unsigned int family, model, stepping;
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int is_intel = 0, is_amd = 0;
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eax = ebx = ecx = edx = 0;
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/* We assume >= pentium for cpuid */
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eax = 0;
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_cpuid(&eax, &ebx, &ecx, &edx);
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if(eax > 0) {
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char vendor[12];
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memcpy(vendor, &ebx, sizeof(ebx));
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memcpy(vendor+4, &edx, sizeof(edx));
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memcpy(vendor+8, &ecx, sizeof(ecx));
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if(!strncmp(vendor, "GenuineIntel", sizeof(vendor)))
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is_intel = 1;
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if(!strncmp(vendor, "AuthenticAMD", sizeof(vendor)))
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is_amd = 1;
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eax = 1;
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_cpuid(&eax, &ebx, &ecx, &edx);
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} else return 0;
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stepping = eax & 0xf;
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model = (eax >> 4) & 0xf;
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if(model == 0xf || model == 0x6) {
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model += ((eax >> 16) & 0xf) << 4;
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}
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family = (eax >> 8) & 0xf;
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if(family == 0xf) {
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family += (eax >> 20) & 0xff;
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}
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if(is_amd) {
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ef_eax = 0x80000001;
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_cpuid(&ef_eax, &ef_ebx, &ef_ecx, &ef_edx);
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}
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switch(cpufeature) {
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case _CPUF_I386_PSE:
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return edx & CPUID1_EDX_PSE;
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case _CPUF_I386_PGE:
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return edx & CPUID1_EDX_PGE;
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case _CPUF_I386_APIC_ON_CHIP:
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return edx & CPUID1_EDX_APIC_ON_CHIP;
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case _CPUF_I386_TSC:
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return edx & CPUID1_EDX_TSC;
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case _CPUF_I386_FPU:
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return edx & CPUID1_EDX_FPU;
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#define SSE_FULL_EDX (CPUID1_EDX_FXSR | CPUID1_EDX_SSE | CPUID1_EDX_SSE2)
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#define SSE_FULL_ECX (CPUID1_ECX_SSE3 | CPUID1_ECX_SSSE3 | \
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CPUID1_ECX_SSE4_1 | CPUID1_ECX_SSE4_2)
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case _CPUF_I386_SSE1234_12:
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return (edx & SSE_FULL_EDX) == SSE_FULL_EDX &&
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(ecx & SSE_FULL_ECX) == SSE_FULL_ECX;
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case _CPUF_I386_FXSR:
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return edx & CPUID1_EDX_FXSR;
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case _CPUF_I386_SSE:
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return edx & CPUID1_EDX_SSE;
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case _CPUF_I386_SSE2:
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return edx & CPUID1_EDX_SSE2;
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case _CPUF_I386_SSE3:
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return ecx & CPUID1_ECX_SSE3;
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case _CPUF_I386_SSSE3:
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return ecx & CPUID1_ECX_SSSE3;
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case _CPUF_I386_SSE4_1:
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return ecx & CPUID1_ECX_SSE4_1;
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case _CPUF_I386_SSE4_2:
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return ecx & CPUID1_ECX_SSE4_2;
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case _CPUF_I386_HTT:
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return edx & CPUID1_EDX_HTT;
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case _CPUF_I386_HTT_MAX_NUM:
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return (ebx >> 16) & 0xff;
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case _CPUF_I386_SYSENTER:
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if(!is_intel) return 0;
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if(!(edx & CPUID1_EDX_SYSENTER)) return 0;
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if(family == 6 && model < 3 && stepping < 3) return 0;
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return 1;
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case _CPUF_I386_SYSCALL:
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if(!is_amd) return 0;
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if(!(ef_edx & CPUID_EF_EDX_SYSENTER)) return 0;
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return 1;
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}
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return 0;
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}
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