2a8fabf4ad
-Convert the include directory over to using bsdmake syntax -Update/add mkfiles -Modify install(1) so that it can create symlinks -Update makefiles to use new install(1) options -Rename /usr/include/ibm to /usr/include/i386 -Create /usr/include/machine symlink to arch header files -Move vm_i386.h to its new home in the /usr/include/i386 -Update source files to #include the header files at their new homes. -Add new gnu-includes target for building GCC headers
62 lines
2.5 KiB
C
62 lines
2.5 KiB
C
/* Interrupt numbers and hardware vectors. */
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#ifndef _INTERRUPT_H
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#define _INTERRUPT_H
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#if (CHIP == INTEL)
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/* 8259A interrupt controller ports. */
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#define INT_CTL 0x20 /* I/O port for interrupt controller */
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#define INT_CTLMASK 0x21 /* setting bits in this port disables ints */
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#define INT2_CTL 0xA0 /* I/O port for second interrupt controller */
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#define INT2_CTLMASK 0xA1 /* setting bits in this port disables ints */
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/* Magic numbers for interrupt controller. */
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#define END_OF_INT 0x20 /* code used to re-enable after an interrupt */
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/* Interrupt vectors defined/reserved by processor. */
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#define DIVIDE_VECTOR 0 /* divide error */
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#define DEBUG_VECTOR 1 /* single step (trace) */
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#define NMI_VECTOR 2 /* non-maskable interrupt */
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#define BREAKPOINT_VECTOR 3 /* software breakpoint */
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#define OVERFLOW_VECTOR 4 /* from INTO */
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/* Fixed system call vector. */
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#define KERN_CALL_VECTOR 32 /* system calls are made with int SYSVEC */
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#define IPC_VECTOR 33 /* interrupt vector for ipc */
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/* Suitable irq bases for hardware interrupts. Reprogram the 8259(s) from
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* the PC BIOS defaults since the BIOS doesn't respect all the processor's
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* reserved vectors (0 to 31).
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*/
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#define BIOS_IRQ0_VEC 0x08 /* base of IRQ0-7 vectors used by BIOS */
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#define BIOS_IRQ8_VEC 0x70 /* base of IRQ8-15 vectors used by BIOS */
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#define IRQ0_VECTOR 0x50 /* nice vectors to relocate IRQ0-7 to */
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#define IRQ8_VECTOR 0x70 /* no need to move IRQ8-15 */
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/* Hardware interrupt numbers. */
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#define NR_IRQ_VECTORS 16
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#define CLOCK_IRQ 0
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#define KEYBOARD_IRQ 1
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#define CASCADE_IRQ 2 /* cascade enable for 2nd AT controller */
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#define ETHER_IRQ 3 /* default ethernet interrupt vector */
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#define SECONDARY_IRQ 3 /* RS232 interrupt vector for port 2 */
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#define RS232_IRQ 4 /* RS232 interrupt vector for port 1 */
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#define XT_WINI_IRQ 5 /* xt winchester */
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#define FLOPPY_IRQ 6 /* floppy disk */
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#define PRINTER_IRQ 7
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#define CMOS_CLOCK_IRQ 8
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#define KBD_AUX_IRQ 12 /* AUX (PS/2 mouse) port in kbd controller */
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#define AT_WINI_0_IRQ 14 /* at winchester controller 0 */
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#define AT_WINI_1_IRQ 15 /* at winchester controller 1 */
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/* Interrupt number to hardware vector. */
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#define BIOS_VECTOR(irq) \
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(((irq) < 8 ? BIOS_IRQ0_VEC : BIOS_IRQ8_VEC) + ((irq) & 0x07))
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#define VECTOR(irq) \
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(((irq) < 8 ? IRQ0_VECTOR : IRQ8_VECTOR) + ((irq) & 0x07))
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#endif /* (CHIP == INTEL) */
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#endif /* _INTERRUPT_H */
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