157 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			157 lines
		
	
	
		
			5.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*===---- cpuid.h - X86 cpu model detection --------------------------------===
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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|  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  *
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|  *===-----------------------------------------------------------------------===
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|  */
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| 
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| #if !(__x86_64__ || __i386__)
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| #error this header is for x86 only
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| #endif
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| 
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| /* Features in %ecx for level 1 */
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| #define bit_SSE3        0x00000001
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| #define bit_PCLMULQDQ   0x00000002
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| #define bit_DTES64      0x00000004
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| #define bit_MONITOR     0x00000008
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| #define bit_DSCPL       0x00000010
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| #define bit_VMX         0x00000020
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| #define bit_SMX         0x00000040
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| #define bit_EIST        0x00000080
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| #define bit_TM2         0x00000100
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| #define bit_SSSE3       0x00000200
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| #define bit_CNXTID      0x00000400
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| #define bit_FMA         0x00001000
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| #define bit_CMPXCHG16B  0x00002000
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| #define bit_xTPR        0x00004000
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| #define bit_PDCM        0x00008000
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| #define bit_PCID        0x00020000
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| #define bit_DCA         0x00040000
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| #define bit_SSE41       0x00080000
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| #define bit_SSE42       0x00100000
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| #define bit_x2APIC      0x00200000
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| #define bit_MOVBE       0x00400000
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| #define bit_POPCNT      0x00800000
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| #define bit_TSCDeadline 0x01000000
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| #define bit_AESNI       0x02000000
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| #define bit_XSAVE       0x04000000
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| #define bit_OSXSAVE     0x08000000
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| #define bit_AVX         0x10000000
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| #define bit_RDRAND      0x40000000
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| 
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| /* Features in %edx for level 1 */
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| #define bit_FPU         0x00000001
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| #define bit_VME         0x00000002
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| #define bit_DE          0x00000004
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| #define bit_PSE         0x00000008
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| #define bit_TSC         0x00000010
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| #define bit_MSR         0x00000020
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| #define bit_PAE         0x00000040
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| #define bit_MCE         0x00000080
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| #define bit_CX8         0x00000100
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| #define bit_APIC        0x00000200
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| #define bit_SEP         0x00000800
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| #define bit_MTRR        0x00001000
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| #define bit_PGE         0x00002000
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| #define bit_MCA         0x00004000
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| #define bit_CMOV        0x00008000
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| #define bit_PAT         0x00010000
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| #define bit_PSE36       0x00020000
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| #define bit_PSN         0x00040000
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| #define bit_CLFSH       0x00080000
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| #define bit_DS          0x00200000
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| #define bit_ACPI        0x00400000
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| #define bit_MMX         0x00800000
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| #define bit_FXSR        0x01000000
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| #define bit_SSE         0x02000000
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| #define bit_SSE2        0x04000000
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| #define bit_SS          0x08000000
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| #define bit_HTT         0x10000000
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| #define bit_TM          0x20000000
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| #define bit_PBE         0x80000000
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| 
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| /* Features in %ebx for level 7 sub-leaf 0 */
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| #define bit_FSGSBASE    0x00000001
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| #define bit_SMEP        0x00000080
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| #define bit_ENH_MOVSB   0x00000200
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| 
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| /* PIC on i386 uses %ebx, so preserve it. */
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| #if __i386__
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| #define __cpuid(__level, __eax, __ebx, __ecx, __edx) \
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|     __asm("  pushl  %%ebx\n" \
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|           "  cpuid\n" \
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|           "  mov    %%ebx,%1\n" \
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|           "  popl   %%ebx" \
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|         : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
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|         : "0"(__level))
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| 
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| #define __cpuid_count(__level, __count, __eax, __ebx, __ecx, __edx) \
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|     __asm("  pushl  %%ebx\n" \
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|           "  cpuid\n" \
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|           "  mov    %%ebx,%1\n" \
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|           "  popl   %%ebx" \
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|         : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
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|         : "0"(__level), "2"(__count))
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| #else
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| #define __cpuid(__level, __eax, __ebx, __ecx, __edx) \
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|     __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
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|                   : "0"(__level))
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| 
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| #define __cpuid_count(__level, __count, __eax, __ebx, __ecx, __edx) \
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|     __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
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|                   : "0"(__level), "2"(__count))
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| #endif
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| 
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| static __inline int __get_cpuid (unsigned int __level, unsigned int *__eax,
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|                                  unsigned int *__ebx, unsigned int *__ecx,
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|                                  unsigned int *__edx) {
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|     __cpuid(__level, *__eax, *__ebx, *__ecx, *__edx);
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|     return 1;
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| }
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| 
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| static __inline int __get_cpuid_max (unsigned int __level, unsigned int *__sig)
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| {
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|     unsigned int __eax, __ebx, __ecx, __edx;
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| #if __i386__
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|     int __cpuid_supported;
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| 
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|     __asm("  pushfl\n"
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|           "  popl   %%eax\n"
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|           "  movl   %%eax,%%ecx\n"
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|           "  xorl   $0x00200000,%%eax\n"
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|           "  pushl  %%eax\n"
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|           "  popfl\n"
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|           "  pushfl\n"
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|           "  popl   %%eax\n"
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|           "  movl   $0,%0\n"
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|           "  cmpl   %%eax,%%ecx\n"
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|           "  je     1f\n"
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|           "  movl   $1,%0\n"
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|           "1:"
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|         : "=r" (__cpuid_supported) : : "eax", "ecx");
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|     if (!__cpuid_supported)
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|         return 0;
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| #endif
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| 
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|     __cpuid(__level, __eax, __ebx, __ecx, __edx);
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|     if (__sig)
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|         *__sig = __ebx;
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|     return __eax;
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| }
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